AK4646EZ Datasheet, PDF (29/78 Pages) Asahi Kasei Microsystems – Stereo CODEC with MIC/SPK-AMP

[AK4646EZ]
LRCK
0123
BICK(32fs)
SDTO(o)
0 15 14
9 10 11 12 13 14 15 0 1 2 3
8 7 6 5 4 3 2 1 0 15 14
SDTI(i)
0 15 14
0123
BICK(64fs)
SDTO(o)
15 14
8 7 6 5 4 3 2 1 0 15 14
15 16 17 18
31 0 1 2 3
210
15 14
SDTI(i)
15 14
210
15:MSB, 0:LSB
Lch Data
Don't Care
15 14
9 10 11 12 13 14 15 0 1
876543210
876543210
15 16 17 18
31 0 1
210
2 1 0 Don't Care
Rch Data
Figure 20. Mode 3 Timing
■ Mono/Stereo Mode
PMADL and PMADR bits set mono/stereo ADC operation.
When changing ADC operation, PMADL and PMADR bits should be set “0” at first.
PMADL bit
0
0
1
1
PMADR bit
ADC Lch data
ADC Rch data
0
All “0”
All “0”
1
Rch Input Signal
Rch Input Signal
0
Lch Input Signal
Lch Input Signal
1
Lch Input Signal
Rch Input Signal
Table 17. Mono/Stereo ADC operation
(default)
MS0630-E-00
- 29 -
2007/06