3X38FTR Datasheet, PDF (57/64 Pages) Agere Systems – OCTAL-FET (Fast Ethernet Transceiver) for 10Base-T/100Base-TX/FX

Preliminary Data Sheet
September 2000
Clock Timing
Table 39. System Clock (RMII Mode)
Symbol
t1
t2
t3
Parameter
Clock High Pulse Width
Clock Low Pulse Width
Clock Period
3X38FTR 208-Pin SQFP
OCTAL-FET for 10Base-T/100Base-TX/FX
Min
Max
Unit
8
12
ns
8
12
ns
19.999
20.001
ns
t1
RMCLK
t2
t3
Figure 16. System Clock
5-6784(F).b
Table 40. Management Clock
Symbol
Parameter
Min
Max
Unit
t1
MDC High Pulse Width
40
—
ns
t2
MDC Low Pulse Width
40
—
ns
t3
MDC Period*
80
—
ns
t4
MDIO(I) Setup to MDC Rising Edge
10
—
ns
t5
MDIO(O) Hold Time from MDC Rising Edge
10
—
ns
t6
MDIO(O) Valid from MDC Rising Edge
0
40
ns
* If the MDC period is less than 160 ns, then there are additional constraints with respect to RMCLK (see MDC pin description).
t1
t2
t3
MDC
t4
t5
MDIO(I)
t6
MDIO(O)
Figure 17. Management Clock
5-6786(F)
Lucent Technologies Inc.
57