3X38FTR Datasheet, PDF (52/64 Pages) Agere Systems – OCTAL-FET (Fast Ethernet Transceiver) for 10Base-T/100Base-TX/FX

3X38FTR 208-Pin SQFP
OCTAL-FET for 10Base-T/100Base-TX/FX
Preliminary Data Sheet
September 2000
Register Information (continued)
Table 31. MR21—RXER Counter (continued)
Bit*
Signal
Type^†
Description
21.7:0
COUNT_8
R Counter Value 8-bit Mode. When in 8-bit counter mode, these main-
tain a count of RXERs (receive errors). It is reset on a read operation.
21.11:8 FALSE_CARRIER R False Carrier Count. When in 8-bit mode, these contain a count of
false carrier events (802.3 Section 27.3.1.5.1). It is reset on a read
operation.
21.15:12
DISCONN
R Disconnect Count. When in 8-bit mode, these contain a count of dis-
connect events (Link Unstable 6, 802.3 Section 27.3.1.5.1). It is reset
on a read operation.
* The format for the bit descriptions is as follows: the first number is the register number, the second number is the bit position in the register.
† R = read, W = write.
Table 32. MR28—Device-Specific Register 1 (Status Register) Bit Descriptions
Bit*
Type^†
Description
28.15:9 (UNUSED) R Unused. Read as 0.
28.8 (BAD_FRM) R/LH Bad Frame. If this bit is a 1, it indicates a packet has been received without an
SFD. This bit is only valid in 10 Mbits/s mode.
28.7 (CODE)
R/LH
This bit is latching high and will only clear after it has been read or the device has
been reset.
Code Violation. When this bit is a 1, it indicates a Manchester code violation has
occurred. The error code will be output on the RRXD lines. Refer to Table 1 for a
detailed description of the RRXD pin error codes. This bit is only valid in
10 Mbits/s mode.
28.6 (APS)
This bit is latching high and will only clear after it has been read or the device has
been reset.
R Autopolarity Status. When register 30, bit 3 is a 0 and this bit is a 1, it indicates
the 3X38 has detected and corrected a polarity reversal on the twisted pair.
28.5 (DISCON)
28.4 (UNLOCKED)
28.3 (RXERR_ST)
28.2 (FRC_JAM)
28.1 (LNK100UP)
28.0 (LNK10UP)
R/LH
R/LH
R/LH
R/LH
R
R
If the APF_EN bit (register 30, bit 3) is a 0, the reversal will be corrected inside the
3X38. This bit is not valid in 100 Mbits/s operation.
Disconnect. If this bit is a 1, it indicates a disconnect. This bit will latch high until
read. This bit is only valid in 100 Mbits/s mode.
Unlocked. Indicates that the TX scrambler lost lock. This bit will latch high until
read. This bit is only valid in 100 Mbits/s mode.
RX Error Status. Indicates a false carrier. This bit will latch high until read. This bit
is only valid in 100 Mbits/s mode.
Force Jam. This bit will latch high until read. This bit is only valid in 100 Mbits/s
mode.
Link Up 100. This bit, when set to a 1, indicates a 100 Mbits/s transceiver is up
and operational.
Link Up 10. This bit, when set to a 1, indicates a 10 Mbits/s transceiver is up and
operational.
* The format for the bit descriptions is as follows: the first number is the register number, the second number is the bit position in the register.
† R = read, LH = latched high.
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