3X38FTR Datasheet, PDF (1/64 Pages) Agere Systems – OCTAL-FET (Fast Ethernet Transceiver) for 10Base-T/100Base-TX/FX

Preliminary Data Sheet
September 2000
3X38FTR 208-Pin SQFP
OCTAL-FET (Fast Ethernet Transceiver) for 10Base-T/100Base-TX/FX
Overview
The 3X38FTR 208-Pin SQFP is an eight-channel,
single-chip complete transceiver designed specifi-
cally for dual-speed 10Base-T, 100Base-TX, and
100Base-FX switches and repeaters. It supports
simultaneous operation in three separate IEEE *
standard modes: 10Base-T, 100Base-TX, and
100Base-FX. The 3X38 uses 0.25 µm low-power
CMOS to achieve extremely low power dissipation
and operates from a single 3.3 V power supply.
Each channel implements the following:
s 10Base-T transceiver function of IEEE 802.3.
s 100Base-TX transceiver function of IEEE 802.3u.
s 100Base-FX transceiver function of IEEE 802.3u.
s Autonegotiation of IEEE 802.3u.
s MII management of IEEE 802.3u.
The 3X38 supports operations over two pairs of
unshielded twisted-pair (UTP) cable (10Base-T and
100Base-TX) and over fiber-optic cable (100Base-
FX).
It has been designed with a flexible system interface
that allows configuration for optimum performance
and effortless design. The individual per-port system
interface can be configured as 10 Mbits/s, or
100 Mbits/s reduced MII (RMII), or 10 Mbits/s, or
100 Mbits/s serial MII (SMII).
Features
10 Mbits/s Transceiver
s Compatible with IEEE 802.3 10Base-T standard
for category 3 unshielded twisted-pair (UTP) cable.
s Compatible with the reduced MII (RMII) specifica-
tion of the RMII consortium version 1.2.
s Selectable 7-pin RMII or 2-pin serial MII (SMII).
s Autopolarity detection and correction.
s Adjustable squelch level for extended line length
capability (two levels).
s On-chip filtering eliminates the need for external
filters.
s Half- and full-duplex operations.
100 Mbits/s TX Transceiver
s Compatible with IEEE 802.3u PCS (clause 23),
PMA (clause 24), autonegotiation (clause 28), and
PMD (clause 25) specifications.
s Compatible with the reduced MII (RMII) specifica-
tion of the RMII consortium version 1.2.
s Selectable 7-pin RMII, 2-pin SMII (serial MII).
s Scrambler/descrambler bypass.
s Selectable carrier sense signal generation (CRS)
asserted during either transmission or reception in
half duplex (CRS asserted during reception only in
full duplex).
s Full- or half-duplex operations.
s On-chip filtering and adaptive equalization that
eliminates the need for external filters.
100 Mbits/s FX Transceiver
s Pseudo-ECL compatible input/output for 100Base-
FX support (with fiber-optic signal detect).
s Compatible with IEEE 802.3u 100Base-FX stan-
dard.
s Reuses existing twisted-pair I/O pins for compati-
ble fiber-optic transceiver pseudo-ECL (PECL)
data:
— No additional data pins required.
— Reuses existing 3X38 pins for fiber-optic
signal detect (FOSD) inputs.
* IEEE is a registered trademark of The Institute of Electrical and Electronics Engineers, Inc.