3X38FTR Datasheet, PDF (51/64 Pages) Agere Systems – OCTAL-FET (Fast Ethernet Transceiver) for 10Base-T/100Base-TX/FX

Preliminary Data Sheet
September 2000
3X38FTR 208-Pin SQFP
OCTAL-FET for 10Base-T/100Base-TX/FX
Register Information (continued)
Table 30. MR20—LED and FIFO Configuration
Bit*
20.15:13
20.12
20.11
20.10
20.9
20.8
20.7
20.6
20.5
20.4
20.3
20.2
20.1
20.0
Signal
Type^†
Description
Reserved
ENH_CRS_DV
FIFO_DEP
AUTO_MODE
ACTLED_FLASH
LINKLED_FLASH
R Reserved.
R/W Enhanced CRS_DV. This bit, when written to a 1, changes the
behavior of CRS_DV in 100 Mbits/s mode so that CRS_DV only goes
high if RXDV (receive data valid) is high. When this bit is a 0 (default),
RCRS_DV will go high on CRS assertion. Default = 0.
R/W FIFO Depth. 0 = Normal RMII FIFO depth (32-bit) 1 = reduced RMII
FIFO depth (16-bit) (for better latency). Default = 0.
R/W Automatic Mode. Disable bicolor automatic mode, when written to a
1. When the bicolor automatic mode is disabled the forced bicolor
LED mode is entered, such that register 20, bits 9 and 8 are now acti-
vated. When in automatic mode (default), the link LED will go low
whenever activity LED is high. Default = 0. This bit is only valid in
bicolor LED mode.
R/W Activity LED Flash. Force activity LED to flash at 320 ms high/low
time, when written to a 1. Default = 0. This bit is only valid in bicolor
LED mode, and automatic mode is disabled.
R/W Link LED Flash. Force link LED to flash at 320 ms high/low time,
when written to a 1. Default = 0. This bit is only valid in bicolor LED
mode, and automatic mode is disabled.
FDUPLED_ON
FDUPLED_OFF
ACTLED_ON
ACTLED_OFF
SPEEDLED_ON
SPEEDLED_OFF
LINKLED_ON
LINKLED_OFF
R/W FDUPLED On. Force FDUPLED on, when written to a 1. Default = 0.
R/W FDULED Off. Force FDUPLED off, when written to a 1 (FDUPLED on
overrides this). Default = 0.
R/W Force ACT On. Force activity LED on, when written to a 1.
Default = 0.
R/W Force ACT Off. Force activity LED off, when written to a 1 (ACT on
overrides this). Default = 0.
R/W Force Speed On. Force speed LED on, when written to a 1.
Default = 0.
R/W Force Speed Off. Force speed LED off, when written to a 1 (speed
on overrides this). Default = 0.
R/W Force LINKLED On. Force link LED on, when written to a 1.
Default = 0.
R/W Force LINKLED Off. Force link LED on, when written to a 1
(LINKLED on overrides this). Default = 0.
* The format for the bit descriptions is as follows: the first number is the register number, the second number is the bit position in the register.
† R = read, W = write.
Table 31. MR21—RXER Counter
Bit*
21.0
21.15:0
Signal
COUNT_MODE
COUNT_16
Type^†
Description
W Counter Mode. This bit, when 0, puts this register in 16-bit counter
mode. When 1, it puts this register in 8-bit counter mode. This bit is
reset to a 0 and cannot be read.
R Counter Value 16-bit Mode. When in 16-bit counter mode, these
maintain a count of RXERs (receive errors). It is reset on a read oper-
ation.
* The format for the bit descriptions is as follows: the first number is the register number, the second number is the bit position in the register.
† R = read, W = write, NA = not applicable.
Lucent Technologies Inc.
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