3X38FTR Datasheet, PDF (25/64 Pages) Agere Systems – OCTAL-FET (Fast Ethernet Transceiver) for 10Base-T/100Base-TX/FX

Preliminary Data Sheet
September 2000
3X38FTR 208-Pin SQFP
OCTAL-FET for 10Base-T/100Base-TX/FX
Pin Descriptions (continued)
Table 7. Table Test Mode Pins (continued)
Pin
Signal
Type
Description
76, 77,
78, 79, 80
73
TMODE[4:0]
3-STATE
I Test Mode Select. Reserved for manufacturing testing. These pins
should be tied low for normal operation.
I 3-state. When this pin is high, all digital outputs will be 3-stated. For
normal operation, pull this pin low.
Table 8. Clock, Reset, FOSD, and Special Configuration Pins
Pin
Signal
Type
Description
126
RMCLK
I RMII/SMII Clock Input. CMOS input level system clock input.
50 MHz in RMII mode, 125 MHz in SMII mode. ±50 ppm, 40%—
60% duty cycle.
72
RESET_NOT
I Full Chip Reset Not. Reset must be asserted low for at least
1 ms. The 3X38 will come out of reset after 2 ms. RMCLK must
remain running during reset.
129
REXTBS
I External Bias Resistor. Connect this pin to a 24.9 kΩ ± 1% resis-
tor to ground. The parasitic load capacitance must be less than
15 pF.
123
REXT100
I External Bias Resistor 100. Connect this pin to a 21.5 kΩ ± 1%
resistor to ground. This sets the 100 Mbits/s TP driver output level.
122
REXT10
I External Bias Resistor 10. Connect this pin to a 21.5 kΩ ± 1%
resistor to ground. This sets the 10 Mbits/s TP driver output level.
67
O_M
I Reserved. Tie this pin high through 10 kΩ resistor.
Lucent Technologies Inc.
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