EVAL-ADUC831QSZ Datasheet, PDF (69/76 Pages) Analog Devices – MicroConverter®, 12-Bit ADCs and DACs with Embedded 62 kBytes Flash MCU

Parameter
EXTERNAL DATA MEMORY WRITE CYCLE
t_WLWH
t_AVLL
t_LLAX
t_LLWL
t_AVWL
t_QVWX
t_QVWH
t_WHQX
t_WHLH
WR Pulsewidth
Address Valid after ALE Low
Address Hold after ALE Low
ALE Low to RD or WR Low
Address Valid to RD or WR Low
Data Valid to WR Transition
Data Setup before WR
Data and Address Hold after WR
RD or WR High to ALE High
12 MHz
Min
Max
400
43
48
200
300
203
33
433
33
43
123
Variable Clock
Min
Max
ADuC831
Unit Figure
6t_CK – 100
ns
72
t_CK – 40
ns
72
t_CK – 35
ns
72
3t_CK – 50 3t_CK + 50 ns
72
4t_CK – 130
ns
72
t_CK – 50
ns
72
7t_CK – 150
ns
72
t_CK – 50
ns
72
t_CK – 40
6t_CK – 100 ns
72
M_CLK
ALE (O)
PSEN (O)
WR (O)
t_LLWL
t_AVLL
t_AVWL
t_LLAX
A0–A7
t_WLWH
t_QVWX
t_QVWH
DATA
t_WHLH
t_WHQX
PORT 2 (O)
A16–A23
A8–A15
Figure 72. External Data Memory Write Cycle
REV. 0
–69–