EVAL-ADUC831QSZ Datasheet, PDF (68/76 Pages) Analog Devices – MicroConverter®, 12-Bit ADCs and DACs with Embedded 62 kBytes Flash MCU

ADuC831
Parameter
EXTERNAL DATA MEMORY READ CYCLE
t_RLRH
t_AVLL
t_LLAX
t_RLDV
t_RHDX
t_RHDZ
t_LLDV
t_AVDV
t_LLWL
t_AVWL
t_RLAZ
t_WHLH
RD Pulsewidth
Address Valid after ALE Low
Address Hold after ALE Low
RD Low to Valid Data In
Data and Address Hold after RD
Data Float after RD
ALE Low to Valid Data In
Address to Valid Data In
ALE Low to RD or WR Low
Address Valid to RD or WR Low
RD Low to Address Float
RD or WR High to ALE High
12 MHz
Min
Max
400
43
48
252
0
97
517
585
200
300
203
0
43
123
Variable Clock
Min
Max
Unit Figure
6t_CK – 100
ns 71
t_CK – 40
ns 71
t_CK – 35
ns 71
5t_CK – 165 ns 71
0
ns 71
2t_CK –70
ns 71
8t_CK – 150 ns 71
9t_CK – 165 ns 71
3t_CK – 50 3t_CK + 50 ns 71
4t_CK – 130
ns 71
0
ns 71
t_CK – 40
6t_CK – 100 ns 71
M_CLK
ALE (O)
PSEN (O)
RD (O)
PORT 0 (I/O)
t_LLDV
t_LLWL
t_AVLL
t_AVWL
t_LLAX
A0–A7
(OUT)
t_AVDV
t_RLDV
t_RLAZ
t_WHLH
t_RLRH
t_RHDX
DATA (IN)
t_RHDZ
PORT 2 (O)
A16–A23
A8–A15
Figure 71. External Data Memory Read Cycle
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