EVAL-ADUC831QSZ Datasheet, PDF (40/76 Pages) Analog Devices – MicroConverter®, 12-Bit ADCs and DACs with Embedded 62 kBytes Flash MCU

ADuC831
I²C COMPATIBLE INTERFACE
The ADuC831 supports a fully licensed^* I²C serial interface. The
I²C interface is implemented as a full hardware slave and software
master. SDATA is the data I/O pin and SCLOCK is the serial
clock. These two pins are shared with the MOSI and SCLOCK pins
of the on-chip SPI interface. Therefore, the user can only enable
one or the other interface at any given time (see SPE in SPICON
previously). Application Note uC001 describes the operation
of this interface as implemented, and is available from the
MicroConverter website at www.analog.com/microconverter.
Three SFRs are used to control the I²C interface. These are described below:
I2CCON
I²C Control Register
SFR Address
E8H
Power-On Default Value 00H
Bit Addressable
Yes
Table XII. I2CCON SFR Bit Designations
Bit
Name
Description
7
MDO
I²C Software Master Data Output Bit (Master Mode Only). This data bit is used to implement a
master I²C transmitter interface in software. Data written to this bit will be output on the SDATA
pin if the data output enable (MDE) bit is set.
6
MDE
I²C Software Master Data Output Enable Bit (Master Mode Only). Set by user to enable the SDATA
pin as an output (Tx). Cleared by the user to enable SDATA pin as an input (Rx).
5
MCO
I²C Software Master Clock Output Bit (Master Mode Only). This data bit is used to implement a master
I²C transmitter interface in software. Data written on this bit will be output on the SCLOCK pin.
4
MDI
I²C Software Master Data Input Bit (Master Mode Only). This data bit is used to implement a master
I²C receiver interface in software. Data on the SDATA pin is latched into this bit on SCLOCK if
the Data Output Enable (MDE) bit is ‘0.’
3
I2CM
I²C Master/Slave Mode Bit. Set by user to enable I²C software master mode. Cleared by user to
enable I²C hardware slave mode.
2
I2CRS
I²C Reset Bit (Slave Mode Only). Set by user to reset the I²C interface. Cleared by user code for
normal I²C operation.
1
I2CTX
I²C Direction Transfer Bit (Slave Mode Only). Set by the MicroConverter if the interface is
transmitting. Cleared by the MicroConverter if the interface is receiving.
0
I2CI
I²C Interrupt Bit (Slave Mode Only). Set by the MicroConverter after a byte has been transmitted
or received. Cleared automatically when user code reads the I2CDAT SFR (see I2CDAT below).
I2CADD
Function
SFR Address
Power-On Default Value
Bit Addressable
I2CDAT
Function
SFR Address
Power-On Default Value
Bit Addressable
I²C Address Register
Holds the I²C peripheral address for the part. It may be overwritten by user code. Technical Note uC001
at www.analog.com/microconverter describes the format of the I²C standard 7-bit address in detail.
9BH
55H
No
I²C Data Register
The I2CDAT SFR is written by the user to transmit data over the I²C interface or read by user code to
read data just received by the I²C interface. Accessing I2CDAT automatically clears any pending I²C
interrupt and the I2CI bit in the I2CCON SFR. User software should only access I2CDAT once per
interrupt cycle.
9AH
00H
No
*Purchase of licensed I²C components of Analog Devices or one of its sublicensed Associated Companies conveys a license for the purchaser under the Philips I²C
Patent Rights to use the ADuC831 in an I²C system, provided that the system conforms to the I²C Standard Specification as defined by Philips.
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