EVAL-ADUC831QSZ Datasheet, PDF (11/76 Pages) Analog Devices – MicroConverter®, 12-Bit ADCs and DACs with Embedded 62 kBytes Flash MCU

Typical Performance Characteristics–ADuC831
The typical performance plots presented in this section illustrate
typical performance of the ADuC831 under various operating
conditions.
TPC 1 and TPC 2 below show typical ADC Integral Nonlinearity
(INL) errors from ADC code 0 to code 4095 at 5 V and 3 V
supplies respectively. The ADC is using its internal reference
(2.5 V) and operating at a sampling rate of 152 kHz and the
typically worst-case errors in both plots is just less than 0.3 LSBs.
TPC 3 and TPC 4 below show the variation in Worst Case
Positive (WCP) INL and Worst Case Negative (WCN) INL
versus external reference input voltage.
TPC 5 and TPC 6 show typical ADC differential nonlinearity
(DNL) errors from ADC code 0 to code 4095 at 5 V and 3 V sup-
plies, respectively. The ADC is using its internal reference (2. V) and
operating at a sampling rate of 152 kHz and the typically worst case
errors in both plots is just less than 0.2 LSBs.
TPC 7 and TPC 8 show the variation in worst case positive
(WCP) DNL and worst-case negative (WCN) DNL versus
external reference input voltage.
TPC 9 shows a histogram plot of 10,000 ADC conversion
results on a dc input with V_DD = 5 V. The plot illustrates an
excellent code distribution pointing to the low noise perfor-
mance of the on-chip precision ADC.
TPC 10 shows a histogram plot of 10,000 ADC conversion
results on a dc input for V_DD = 3 V. The plot again illustrates a
very tight code distribution of 1 LSB with the majority of codes
appearing in one output bin.
TPC 11 and TPC 12 show typical FFT plots for the ADuC831.
These plots were generated using an external clock input. The
ADC is using its internal reference (2.5 V) sampling a full-scale,
10 kHz sine wave test tone input at a sampling rate of 149.79 kHz.
The resultant FFTs shown at 5 V and 3 V supplies illustrate an
excellent 100 dB noise floor, 71 dB Signal-to-Noise Ratio (SNR)
and THD greater than –80 dB.
TPC 13 and TPC 14 show typical dynamic performance versus
external reference voltages. Again excellent ac performance can
be observed in both plots with some roll-off being observed as
V_REF falls below 1 V.
TPC 15 shows typical dynamic performance versus sampling
frequency. SNR levels of 71 dBs are obtained across the sam-
pling range of the ADuC831.
TPC 16 shows the voltage output of the on-chip temperature
sensor versus temperature. Although the initial voltage output at
25ºC can vary from part to part, the resulting slope of
–2 mV/ºC is constant across all parts.
1.0
0.8
AV_DD / DV_DD = 5V
f_S = 152kHz
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
0
511 1023 1535 2047 2559 3071 3583 4095
ADC CODES
TPC 1. Typical INL Error, V_DD = 5 V
1.2
0.6
AV_DD/DV_DD = 5V
1.0
f_S = 152kHz
0.4
0.8
0.6
0.2
WCP INL
0.4
0
0.2
0
–0.2
–0.2
WCN INL
–0.4
–0.4
–0.6
–0.6
0.5
1.0
1.5
2.0
2.5
5.0
EXTERNAL REFERENCE – V
TPC 3. Typical Worst Case INL Error vs. V_REF, V_DD = 5 V
1.0
AV_DD/DV_DD = 3V
0.8
f_S = 152kHz
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
0
511 1023 1535 2047 2559 3071 3583 4095
ADC CODES
TPC 2. Typical INL Error, V_DD = 3 V
REV. 0
0.8
0.8
AV_DD/DV_DD = 3V
0.6
f_S = 152kHz
0.6
0.4
WCP INL
0.4
0.2
0.2
0
0
–0.2
–0.2
–0.4
WCN INL
–0.4
–0.6
–0.6
–0.8
–0.8
0.5
1.0
1.5
2.0
2.5
3.0
EXTERNAL REFERENCE – V
TPC 4. Typical Worst Case INL Error vs. V_REF, V_DD = 3 V
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