EVAL-ADUC831QSZ Datasheet, PDF (42/76 Pages) Analog Devices – MicroConverter®, 12-Bit ADCs and DACs with Embedded 62 kBytes Flash MCU

ADuC831
DUAL DATA POINTER
The ADuC831 incorporates two data pointers. The second data
pointer is a shadow data pointer and is selected via the data
pointer control SFR (DPCON). DPCON also includes some
nice features such as automatic hardware post-increment and
post-decrement as well as automatic data pointer toggle.
DPCON is described in Table XIII.
DPCON
SFR Address
Power-On Default Value
Bit Addressable
Data Pointer Control SFR
A7H
00H
No
Bit Name
7
----
6
DPT
5
DP1m1
4
DP1m0
3
DP0m1
2
DP0m0
1
0
DPSEL
Table XIII. DPCON SFR Bit Designations
Description
Reserved for Future Use.
Data Pointer Automatic Toggle Enable.
Cleared by user to disable auto swapping of the DPTR.
Set in user software to enable automatic toggling of the DPTR after each MOVX or MOVC instruction.
Shadow Data Pointer Mode.
These two bits enable extra modes of the shadow data pointer operation, allowing for more compact
and more efficient code size and execution.
m1 m0
Behavior of the Shadow Data Pointer
0
0
8052 Behavior
0
1
DPTR is post-incremented after a MOVX or a MOVC instruction.
1
0
DPTR is post-decremented after a MOVX or MOVC instruction.
1
1
DPTR LSB is toggled after a MOVX or MOVC instruction.
(This instruction can be useful for moving 8-bit blocks to/from 16-bit devices.)
Main Data Pointer Mode.
These two bits enable extra modes of the main data pointer operation, allowing for more compact and
more efficient code size and execution.
m1 m0 Behavior of the Main Data Pointer
0
0
8052 Behavior
0
1
DPTR is post-incremented after a MOVX or a MOVC instruction.
1
0
DPTR is post-decremented after a MOVX or MOVC instruction.
1
1
DPTR LSB is toggled after a MOVX or MOVC instruction.
(This instruction can be useful for moving 8-bit blocks to/from 16-bit devices.)
This bit is not implemented to allow the INC DPCON instruction toggle the data pointer without
incrementing the rest of the SFR.
Data Pointer Select.
Cleared by user to select the main data pointer. This means that the contents of this 24-bit register
is placed into the three SFRs DPL, DPH, and DPP.
Set by the user to select the shadow data pointer. This means that the contents of a separate 24-bit
register appears in the three SFRs DPL, DPH, and DPP.
Note 1: This is the only place where the main and shadow data
pointers are distinguished. Everywhere else in this data sheet
wherever the DPTR is mentioned, operation on the active
DPTR is implied.
Note 2: Only MOVC/MOVX @DPTR instructions are relevant
above. MOVC/MOVX PC/@Ri instructions will not cause the
DPTR to automatically post increment/decrement, and so on.
To illustrate the operation of DPCON, the following code will
copy 256 bytes of code memory at address D000H into XRAM
starting from address 0000H.
The following code uses 16 bytes and 2054 cycles. To perform
this on a standard 8051 requires approximately 33 bytes and
7172 cycles (depending on how it is implemented).
MOV DPTR,#0
MOV DPCON,#55H
MOV DPTR,#0D000H
MOVELOOP:
CLR A
MOVC A,@A+DPTR
MOVX @DPTR,A
MOV A, DPL
JNZ MOVELOOP
; Main DPTR = 0
; Select shadow DPTR
; DPTR1 increment mode,
; DPTR0 increment mode
; DPTR auto toggling ON
; Shadow DPTR = D000H
; Get data
; Post Inc DPTR
; Swap to Main DPTR (Data)
; Put ACC in XRAM
; Increment main DPTR
; Swap Shadow DPTR (Code)
–42–
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