EVAL-ADUC831QSZ Datasheet, PDF (66/76 Pages) Analog Devices – MicroConverter®, 12-Bit ADCs and DACs with Embedded 62 kBytes Flash MCU

ADuC831
TIMING SPECIFICATIONS1, 2, 3
(AV_DD = DV_DD = 3.0 V or 5.0 V ؎ 10%. All specifications T_A = T_MIN to T_MAX, unless otherwise noted.)
Parameter
12 MHz
Min Typ Max
Variable Clock
Min Typ Max
Unit Figure
CLOCK INPUT (External Clock Driven XTAL1)
t_CK
XTAL1 Period
83.33
t_CKL
XTAL1 Width Low
20
t_CKH
XTAL1 Width High
20
t_CKR
t_CKF
t_CYC4
XTAL1 Rise Time
XTAL1 Fall Time
ADuC831 Machine Cycle Time
20
20
1
62.5
1000 ns
68
20
ns
68
20
ns
68
20
ns
68
20
ns
68
12t_CK
µs
NOTES
1_{AC inputs during testing are driven at DVDD – 0.5 V for a Logic 1 and 0.45 V for a Logic 0. Timing measurements are made at V IH min for a Logic 1 and VIL max for}
a Logic 0.
2_{For timing purposes, a port pin is no longer floating when a 100 mV change from load voltage occurs. A port pin begins to float when a 100 mV change from the}
loaded V_OH/V_OL level occurs.
3_{CLOAD for Port0, ALE, PSEN outputs = 100 pF; CLOAD for all other outputs = 80 pF unless otherwise noted.}
4_{ADuC831 Machine Cycle Time is nominally defined as MCLKIN/12.}
t_CKH
t_CKR
DV_DD – 0.5V
0.45V
t_CKL
t_CKF
t_CK
Figure 68. XTAL 1 Input
0.2DV_DD + 0.9V
TEST POINTS
0.2DV_DD – 0.1V
V_LOAD – 0.1V
V_LOAD
V_LOAD + 0.1V
TIMING
REFERENCE
POINTS
Figure 69. Timing Waveform Characteristics
V_LOAD – 0.1V
V_LOAD
V_LOAD – 0.1V
–66–
REV. 0