Z86C34 Datasheet, PDF (68/70 Pages) Zilog, Inc. – CMOS Z8 MCUs WITH ASCI UART OFFER EFFICIENT, COST-EFFECTIVE DESIGN FLEXIBILITY

Z86C34/C35/C36/C44/C45/C46
CMOS Z8® MCUs with ASCI UART
PRECAUTIONS (Continued)
PRECAUTIONS
1. Enabling the transmit interrupt (bit 0 in the ASCI
STAT register) does not make the device ready for
transmitter-related interrupts. The receiver interrupt
(bit 3 in the ASCI STAT register) must also be enabled.
Workaround: For transmit interrupts to be generated,
the RIE bit must also be set. When IRQ3 is generated,
the software should check the STAT register for
details on the interrupt source.
2. When using the device in full-duplex mode under in-
terrupts (both transmit and receive interrupts enabled),
a small window exists where a transmit or receive in-
ZiLOG
terrupt may be lost. This situation occurs when an in-
terrupt is generated by one side (either the transmitter
or receiver) and, before the interrupt is serviced, an-
other interrupt is generated by the other side. The sec-
ond interrupt may be lost.
Workaround: The only workaround is not to use
transmitter interrupts when using the ASCI in full-
duplex mode. Use the transmitter in polled mode and
the receiver in interrupt mode for full duplex
operation. In half-duplex operation, this anomaly does
not create a problem.
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PRELIMINARY
DS007601-Z8X0499