Z86C34 Datasheet, PDF (58/70 Pages) Zilog, Inc. – CMOS Z8 MCUs WITH ASCI UART OFFER EFFICIENT, COST-EFFECTIVE DESIGN FLEXIBILITY

Z86C34/C35/C36/C44/C45/C46
CMOS Z8® MCUs with ASCI UART
MASK OPTIONS
Below is an example of the ROM mask bit option selection
for this product.
ZiLOG
Options
ROM Protect
RAM Protect
System Clock Source
Oscillator Operational Mode
WDT Mode
Auto Latch Mode
Port 0 Pull-Ups
Port 1 Pull-Ups
Port 2 Pull-Ups
Option Selections
Disable ROM Protect
Disable RAM Protect
RC Oscillator Enable
Normal High-Frequency Operation
Enabled
WDT Enabled by Software Only
Disable Auto Latches
Disable Pull-Ups
Disable Pull-Ups
Disable Pull-Ups
Enable ROM Protect
Enable RAM Protect
Crystal/Other Clock Source
32-kHz Crystal Operation Enabled
(Limits High-Frequency Operation)
WDT Enabled Automatically After
RESET
Enable Auto Latches
Enable Pull-Ups
Enable Pull-Ups
Enable Pull-Ups
ROM Protect. Selecting the DISABLE ROM PROTECT op-
tion READs the software program that is in the program
memory using ZiLOG’s internal factory test mode. How-
ever, none of the standard methods for reading or verifying
the code in the microcontroller uses an EPROM program-
mer. With this option disabled, ZiLOG is able to fully test
the ROM memory and provides its standard warranty for
the part. Selecting the ENABLE ROM PROTECT option ne-
gates the possibility of reading the code out of the part using
a tester, programmer, or any other standard method. ZiLOG
will be unable to test the ROM memory at any time prior
to customer delivery.
The ROM PROTECT option bit only affects the ability to
read the code and does not affect the operation of the part
in an application. If the ROM PROTECT option is disabled,
ZiLOG tests the part for ROM fallout and parts which fail
are not shipped to the customer. When the ROM PROTECT
option is enabled, ZiLOG cannot perform these tests on the
ROM. When ROM PROTECT is enabled, except for the im-
proper transfer of the code by ZiLOG, all ROM memory
software errors shall be the responsibility of the Buyer and
ZiLOG shall have no obligation to repair or replace product
containing software errors. Selecting the ENABLE ROM
PROTECT option waives all warranties of ZiLOG, ex-
pressed or implied, on microcontrollers containing ROM
failures including, but not limited to, the implied warranty
of merchantability and fitness for a particular purpose.
RAM Protect. Selecting the DISABLE RAM PROTECT op-
tion does not affect the RAM memory. RAM memory op-
erates as defined in this Product Specification for all address
locations. Selecting the ENABLE RAM PROTECT option,
allows protection (under software control) of a portion of
the RAM’s address space from being read or written.
System Clock Source. Selecting the RC OSCILLATOR
ENABLE option, configures the oscillator circuit on the mi-
crocontroller to work with an external RC circuit. Selecting
the CRYSTAL/OTHER CLOCK SOURCE option configures
the oscillator circuit to work with an external crystal, ce-
ramic resonator, or LC oscillator.
Oscillator Operational Mode. Selecting the NORMAL
HIGH FREQUENCY OPERATION ENABLED option en-
ables the part to operate using a standard crystal or resona-
tor, but it does not operate using a 32-kHz crystal. Selecting
the 32-KHZ OPERATION ENABLED option enables the mi-
crocontroller to work with a 32-kHz crystal and an external
feedback resistor—these must be supplied between the
XTAL1 and XTAL2 pins. (If RC OSCILLATOR ENABLED
is selected in the SYSTEM CLOCK SOURCE option, this
option defaults to the NORMAL HIGH FREQUENCY OP-
ERATION ENABLED bit.)
WDT Mode. Selecting the WDT ENABLED BY SOFT-
WARE ONLY option operates the Watch Dog Timer (WDT)
when turned on under software control. Selecting the WDT
ENABLED AUTOMATICALLY AFTER RESET option starts
the WDT automatically at RESET.There is no way to dis-
able or stop this mode, making it necessary in the code to
periodically clear the WDT to prevent it from resetting the
microcontroller. If the WDT ENABLED AUTOMATICAL-
LY AFTER RESET option and the WDT DRIVEN BY SYS-
TEM CLOCK option (if offered) are selected, the WDT nev-
58
PRELIMINARY
DS007601-Z8X0499