Z86C34 Datasheet, PDF (33/70 Pages) Zilog, Inc. – CMOS Z8 MCUs WITH ASCI UART OFFER EFFICIENT, COST-EFFECTIVE DESIGN FLEXIBILITY

ZiLOG
Z86C34/C35/C36/C44/C45/C46
CMOS Z8® MCUs with ASCI UART
General-Purpose Registers (GPR). These registers are
undefined after the device is powered up. The registers keep
their most recent value after any RESET, as long as the RE-
SET occurs in the V_CC voltage-specified operating range.
These do not keep their most recent state from a Low Volt-
age Protection (V_LV) RESET if the V_CC drops below 1.8V.
Note: Register Bank E0–EF is only accessed through working
register and indirect addressing modes.
RAM Protect. The upper portion of the RAM’s address
spaces %80F to %EF (excluding the control registers) are
protected from writing. The RAM Protect bit option is
mask-programmable and is selected by the customer when
the ROM code is submitted. After the mask option is se-
lected, the user activates this feature from the internal ROM
code to turn off/on the RAM Protect by loading either a 0
or 1 into the IMR register, bit D6. A 1 in D6 enables RAM
Protect.
Stack. The Z8 internal register file is used for the stack. The
16-bit Stack Pointer (R254–R255) is used for the external
stack, which can reside anywhere in the data memory for
ROMless mode. An 8-bit Stack Pointer (R255) is used for
the internal stack that resides within the 236 general-pur-
pose registers (R4–R239). Stack Pointer High (SPH) is used
as a general-purpose register when using internal stack
only. The devices in 28-pin packages use the 8-bit stack
pointer (R255) for internal stack only.
Note: R254 and R255 are set to 00h after any RESET or Stop-
Mode Recovery.
Counter/Timers. There are two 8-bit programmable
counter/timers (T0–T1), each driven by its own 6-bit pro-
grammable prescaler. The T1 prescaler is driven by internal
or external clock sources; however, the T0 prescaler is driv-
en by the internal clock only (Figure 22).
The 6-bit prescalers can divide the input frequency of the
clock source by any integer number from 1 to 64. Each pres-
caler drives its counter, which decrements the value (1 to
256) that is loaded into the counter. When the counter
reaches the end of the count, a timer interrupt request, IRQ4
(T0) or IRQ5 (T1), is generated.
The counters can be programmed to START, STOP, restart
to CONTINUE, or restart from the initial value. The counters
can also be programmed to STOP upon reaching 0 (single
pass mode) or to automatically reload the initial value and
continue counting (modulo–n continuous mode).
The counters, but not the prescalers, are read at any time
without disturbing their value or count mode. The clock
source for T1 is user-definable and is either the internal mi-
croprocessor clock divide-by-four, or an external signal in-
put through Port 3. The Timer Mode register configures the
external timer input (P31) as an external clock, a trigger in-
put that can be retriggerable or nonretriggerable, or as a gate
input for the internal clock. The counter/timers can be cas-
caded by connecting the T0 output to the input of T1. T_IN
Mode is enabled by setting R243 PRE1 bit D1 to 0.
DS007601-Z8X0499
PRELIMINARY
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