Z86C34 Datasheet, PDF (25/70 Pages) Zilog, Inc. – CMOS Z8 MCUs WITH ASCI UART OFFER EFFICIENT, COST-EFFECTIVE DESIGN FLEXIBILITY

ZiLOG
Z86C34/C35/C36/C44/C45/C46
CMOS Z8® MCUs with ASCI UART
Port 2 (P27–P20). Port 2 is an 8-bit, bidirectional, CMOS-
compatible I/O port. These eight I/O lines are configured
under software control as an input or output, independently.
Port 2 is always available for I/O operation. The input buff-
ers are Schmitt-triggered. Bits programmed as outputs may
be globally programmed as either push-pull or open-drain.
Low-EMI output buffers can be globally programmed by
the software.
Port 2 may be placed under handshake control. In this Hand-
shake Mode, Port 3 lines P31 and P36 are used as the hand-
shake controls lines DAV2 and RDY2. The handshake signal
assignment for Port 3 lines P31 and P36 is dictated by the di-
rection (input or output) assigned to Bit 7, Port 2 (Figure 14).
Open Drain
OE
Out
In
Port 2 (I/O)
Z8
Handshake Controls
DAV2 and RDY2
(P31 and P36)
Pull-Up
Transistor Enable
(Mask Option)
PAD
1.5
2.3 Hysteresis @ V_CC = 5.0V.
R ≈ 500 KΩ
Figure 14. Port 2 Configuration
Auto Latch
(mask option)
DS007601-Z8X0499
PRELIMINARY
25