Z86C34 Datasheet, PDF (46/70 Pages) Zilog, Inc. – CMOS Z8 MCUs WITH ASCI UART OFFER EFFICIENT, COST-EFFECTIVE DESIGN FLEXIBILITY

Z86C34/C35/C36/C44/C45/C46
CMOS Z8® MCUs with ASCI UART
ZiLOG
INTERRUPTS
The ASCI channel generates one interrupt (IRQ3) from two
sources of interrupts: a receiver and a transmitter. In addi-
tion, there are several conditions that may cause these in-
terrupts to trigger. Figure 32 illustrates the different condi-
tions for each interrupt source enabled under program
control.
FIFO full
Overrun error
Framing Error
Parity Error
Start Bit
Receiver
Interrupt
Sources
ASCI
Interrupt
(IRQ3)
Buffer Empty
Transmitter
Interrupt
Sources
Figure 32. ASCI Interrupt Conditions and Sources
46
PRELIMINARY
DS007601-Z8X0499