XQV100 Datasheet, PDF (3/31 Pages) Xilinx, Inc – QPro Virtex 2.5V QML

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QPro Virtex 2.5V QML High-Reliability FPGAs
Recommended Operating Conditions
Symbol
Description
Min
Max Units
V_CCINT Supply voltage relative to GND, T_C = –55°C to +125°C Ceramic packages 2.5 – 5% 2.5 + 5% V
Supply voltage relative to GND, T_J = –55°C to +125°C Plastic packages
2.5 – 5% 2.5 + 5% V
V_CCO Supply voltage relative to GND, T_C = –55°C to +125°C Ceramic packages
1.2
3.6
V
Supply voltage relative to GND, T_J = –55°C to +125°C Plastic packages
1.2
3.6
V
T_IN Input signal transition time
-
250
ns
T_IC Initialization Temperature Range⁽⁴⁾
XQVR300
–55
+125
°C
XQVR600
–55
+125
°C
XQVR1000
–40
+125
°C
T_OC Operational Temperature Range⁽⁵⁾
XQVR300
XQVR600
–55
+125
°C
–55
+125
°C
XQVR1000
–55
+125
°C
Notes:
1. Correct operation is guaranteed with a minimum V_CCINT of 2.25V (Nominal V_CCINT – 10%). Below the minimum value stated above,
all delay parameters increase by 3% for each 50 mV reduction in V_CCINT below the specified range.
2. At junction temperatures above those listed as Operating Conditions, all delay parameters increase by 0.35% per °C.
3. Input and output measurement threshold is ~50% of V_CC.
4. Initialization occurs from the moment of V_CC ramp-up to the rising transition of the INIT pin.
5. The device is operational after the INIT pin has transitioned high.
DC Characteristics Over Recommended Operating Conditions
Symbol
Description
Device Min Max Units
V_DRINT Data retention V_CCINT voltage
(below which configuration data may be lost)
All
2.0
-
V
V_DRIO Data retention V_CCO voltage
(below which configuration data may be lost)
All
1.2
-
V
I_CCINTQ Quiescent V_CCINT supply current⁽¹⁾
XQV100
-
XQV300
-
50 mA
75 mA
XQV600
-
100 mA
XQV1000
-
100 mA
I_CCOQ Quiescent V_CCINT supply current⁽¹⁾
XQV100
-
XQV300
-
2
mA
2
mA
XQV600
-
2
mA
XQV1000
-
2
mA
I_REF V_REF current per V_REF pin
-
-
20
µA
I_L
Input or output leakage current
-
–10 +10 µA
C_IN Input capacitance (sample tested)
-
I_RPU Pad pull-up (when selected) at V_IN = 0V, V_CCO = 3.3V (sample tested)
-
I_RPD Pad pull-down (when selected) at V_IN = 3.6V (sample tested)
-
-
8
pF
(2)
0.25 mA
(2)
0.15 mA
Notes:
1. With no output current loads, no active input pull-up resistors, all I/O pins in a High-Z state and floating.
2. Internal pull-up and pull-down resistors guarantee valid logic levels at unconnected input pins. These pull-up and pull-down resistors
do not guarantee valid logic levels when input pins are connected to other circuits.
DS002 (v1.5) December 5, 2001
www.xilinx.com
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Preliminary Product Specification
1-800-255-7778