DS810 Datasheet, PDF (21/21 Pages) Xilinx, Inc – LogiCORE IP ChipScope AXI

LogiCORE IP ChipScope AXI Monitor (v3.05.a)
Ordering Information
This Xilinx LogiCORE IP module is provided at no additional cost with the Xilinx ISE® Design Suite Embedded
Edition software under the terms of the Xilinx End User License. The core is generated using the Xilinx ISE
Embedded Edition software (EDK).
Information about this and other Xilinx LogiCORE IP modules is available at the Xilinx Intellectual Property page.
For information on pricing and availability of other Xilinx LogiCORE modules and software, please contact your
local Xilinx sales representative.
Revision History
The following table shows the revision history for this document:
Date
9/21/10
12/14/10
3/1/11
6/22/11
10/19/11
1/18/2012
4/24/2012
7/25/2012
Version
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
Description of Revisions
Initial Xilinx release
Added functionality to support AXI4-Lite and AXI4-Stream signals
Updated to v2.00a for 13.1 release; added functionality for increased user customization
Updated to v3.00a for 13.2 release; added AXI Protocol Checker and AXI3 support
Updated to v3.01.a for 13.3 release; added Virtex-7 FPGA support
Updated to v3.02.a for 13.4 release; added Getting Started Tutorial section.
Updated to core version to v3.03.a and add CORE Generator Support for 14.1 release.
Updated to core version to v3.05.a and add CORE Generator Support for 14.2 release.
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DS810 July 25, 2012
www.xilinx.com
21
Product Specification