DS810 Datasheet, PDF (18/21 Pages) Xilinx, Inc – LogiCORE IP ChipScope AXI

LogiCORE IP ChipScope AXI Monitor (v3.05.a)
Monitor to capture. It also explains how to use the ChipScope Pro Analyzer to configure the device, set up triggers,
and view waveform results of the captured AXI signals.
Creating a Project
1. Launch XPS and create a new project by clicking Create New Project Using Base System Builder.
2. Name a project and select ISE for Logic Tool with AXI System as Interconnect type.
3. Select an evaluation board (i.e. Virtex-6 ML605 Evaluation Platform) from the drop-down menu.
For this tutorial, select Single MicroBlaze Processor System.
4. For Processor, Cache and Peripheral Configuration, change Local Memory Size, Instruction Cache Size, and
Data Cache Size to 16kB.
5. Create a design with DDR3_SDRAM and RS232_Uart_1 ( or any other peripherals of your need) and select
Finish.
Instantiating the Chipscope AXI Monitor in XPS
There are two ways to instantiate the Chipscope AXI Monitor in XPS:
Option 1: Debug Wizard
1. Click Debug > Debug Configuration.
2. Click Add ChipScope Peripheral button on bottom-left corner and select To monitor AXI Interconnect signals
(adding AXI Monitor) and click OK.
3. In Monitor Bus Signals, select AXI Interface to monitor from the drop-down menu. For this tutorial, select
DDR3_SDRAM.S_AXI.
4. Select the number of signal samples you want to collect (i.e. 1024) and click OK.
Option 2: System Assembly View:
1. From the IP Catalog window, add Chipscope AXI Monitor (under Debug) and make the appropriate
selections for AXI Settings (i.e. AXI4 Memory Map), ILA Settings, Protocol Checker Settings, and so on.
2. From the IP Catalog window, add Chipscope ICON (under Debug) and make the appropriate settings.
In System Assembly View and under Bus Interfaces tab, notice the two IPs specified (Chipscope AXI Monitor
and Chipscope ICON) are listed now.
3. Expand chipscope_axi_monitor_0 instance and notice that it now shows the MON_AXI interface for it.
Connect MON_AXI interface to DDR3_SDRAM.S_AXI interface (in the drop-down menu under Bus Name
column).
4. Clickthe Ports tab, expand chipscope_axi_monitor_0 instance, connect CHIPSCOPE_ICON_CONTROL to
chipscope_icon_0 using the drop-down menu under Connected Port column.
• Bitstream Generation: Click Hardware > Generate Bitstream.
• Download bitstream: Once bitstream generation is finished, click Device Configuration > Download
bitstream to create a download.bit file in the <proj_dir>/implementation/ directory.
Exporting the Hardware Design to SDK
1. Export the hardware design to SDK by:
• Clicking Export Design in the Navigator menu
or
• Clicking Export Hardware Design to SDK under the Project tab and then clicking Export & Launch SDK.
2. Select a workspace: Create a workspace <proj_dir>/sw to save the SDK files.
DS810 July 25, 2012
www.xilinx.com
18
Product Specification