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DS573 Datasheet, PDF (12/20 Pages) Xilinx, Inc – PLB interface with byte-enable support
LogiCORE IP XPS Timer/Counter (v1.02a)
Control/Status Register 0 (TCSR0)
The Figure 6 and Table 7 shows the Control/Status register 0. Control/Status Register 0 contains the control and
status bits for timer module 0.
X-Ref Target - Figure 6
ENALL T0INT
ARHT0
ENIT0
GENT0
MDT0
0
20 21 22 23 24 25 26 27 28 29 30 31
Reserved
PWMA0
LOAD0
UDT0
ENT0
CAPT0
DS573_06_041910
Figure 6: Timer Control/Status Register 0 (TCSR0)
Table 7: Control/Status Register 0 (TCSR0)
Bits
Name
Description
0 - 20
21
22
23
24
25
Reserved
ENALL
PWMA0
T0INT
ENT0
ENIT0
Reserved
Enable All Timers
0 = No effect on timers
1 = Enable all timers (counters run)
This bit is mirrored in all control/status registers and is used to enable all
counters simultaneously. Writing a ’1’ to this bit sets ENALL, ENT0, and ENT1.
Writing a ’0’ to this register clears ENALL but has no effect on ENT0 and ENT1.
Enable Pulse Width Modulation for Timer0
0 = Disable pulse width modulation
1 = Enable pulse width modulation
PWM requires using Timer0 and Timer1 together as a pair. Timer0 sets the
period of the PWM output, and Timer1 sets the high time for the PWM output.
For PWM Mode, MDT0 and MDT1 must be ’0’ and C_GEN0_ASSERT and
C_GEN1_ASSERT must be ’1’.
Timer0 Interrupt
Indicates that the condition for an interrupt on this timer has occurred. If the
timer mode is capture and the timer is enabled, this bit indicates a capture has
occurred. If the mode is generate, this bit indicates the counter has rolled over.
Must be cleared by writing a ’1’.
Read:
0 = No interrupt has occurred
1 = Interrupt has occurred
Write:
0 = No change in state of T0INT
1 = Clear T0INT (clear to ’0’)
Enable Timer0
0 = Disable timer (counter halts)
1 = Enable timer (counter runs)
Enable Interrupt for Timer0
Enables the assertion of the interrupt signal for this timer. Has no effect on the
interrupt flag in TCSR0.
0 = Disable interrupt signal
1 = Enable interrupt signal
Reset
Value
-
0
0
0
0
0
DS573 April 19, 2010
www.xilinx.com
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Product Specification