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W83L951DG Datasheet, PDF (92/112 Pages) Winbond – Mobile Keyboard and Embedded Controller
W83L951DG/W83L951FG
6.17 Flash Memory
The W83L951DG/FG has a 64KByte, 3.3-volt only CMOS flash memory. The byte-wide (× 8) data
appears on DQ7−DQ0. The device can be programmed and erased in-system with a standard 3.3V
power supply. A 12-volt VPP is not required. The unique cell architecture of the Flash results in fast
program/erase operations with extremely low current consumption (compared to other comparable
3.3-volt flash memory products). The device can also be programmed and erased by using standard
EPROM programmers.
6.17.1 External Programming Mode
The context of flash in Winbond Keyboard controller is empty by default. At the first use, you must
program the flash by external writer device. For programming the flash by external device, the
Winbond Keyboard controller must enter the flash-programming mode by TEST# Pin is connected to
GND. RESET# Pin is connected to GND. FA [7:0] and FD [7:0] port is combined to GP07 to GP00.
FA [7:0] is latched by the ALE (GP34).
In External Programming Mode, W83L951DG/FG protects Internal Flash data, so W83L951DG/FG will
close “Read Command”. Under this condition, users must run “Erase Command” to use “Read
Command”.
6.17.2 Internal Programming Mode
In W83L951DG/FG, in addition to access internal flash by outside, it provides to access SFR by
Microprocessor. When Enable Memory Bit of Memory Mapping Control Register is high, and PC is
F800~FFFFh, Microprocessor can access Internal Flash by SFR.
Table 6-26.Internal Programming Flash Register Define
INTERNAL PROGRAMMING FLASH
INTADDR
NAME
7
6
5
432
F9
FCON
CEB OEB WEB Reserved
FA
FADDH A[15:8]
FB
FADDL
A[7:0]
FC
FDATA
DQ[7:0]
1
0
EXCHANG_GP
6.17.2.1 Flash Control Register (FCON) (Default Value: 0000_0000)
6.17.2.2 Bit7: Flash Chip Select Enable (CEB)
Like CE# Pin. Refer to next section for further details.
Bit6: Flash Output Enable (OEB)
Like OE# Pin. Refer to next section for further details.
Bit5: Flash Write Enable (WEB)
Like WE# Pin. Refer to next section for further details.
Bit4~Bit1: Reserved
Bit0: Exchange GPIOA/B/C to GPIO1/0/3 Function (Reserved)
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