W83L951DG Datasheet, PDF (42/112 Pages) Winbond – Mobile Keyboard and Embedded Controller

W83L951DG/W83L951FG
6.2 Low Pin Count Interface Block
Table 6-7 Low Pin Count Interface Register Define
LOW PIN COUNT INTERFACE(LPC) & SERIAL IRQ & DATA BUFFER BLOCK(10)
INTA
DDR
NAME
7
6
5
4
3
2
1
91 KBCCON Reserved
P92EN
HKBEN HGAEN GA20SET
92
LPCCON
DBB1En DBB0En SIRQ11EN SIRQ10EN SIRQ01EN SIRQ00EN SIRQ1GEN
93 DBB0STS UDF[3:0]
CD0
UDF
IBF0
94 DBB0
Data Buffer 0 [7:0]
95 DBB0ADDH Data Buffer 0 Address High Byte
96 DBB0ADDL Data Buffer 0 Address Low Byte
97 SIRQ0
OBF01 SIRQ Number
OBF00 SIRQ Number
99 DBB1STS UDF[3:0]
CD1
UDF
IBF1
9A DBB1
Data Buffer 1 [7:0]
9B DBB1ADDH Data Buffer 1 Address High Byte
9C DBB1ADDL Data Buffer 1 Address Low Byte
9D SIRQ1
OBF11 SIRQ Number
OBF10 SIRQ Number
0
GA20CLR
SIRQ0GEN
OBF0
OBF1
Gray: Only with System Reset to initial.
6.2.1 Register Description
6.2.1.1 DBB0 Status Register (DBB0STS) (Default Value: 0000_?0?0)
Bit7~4: User Define Flag
Bit3: Indicate IDBB0 Command/Data (By LRESET_N Pin to reset)
1: Command, 0: Data.
Bit2: User Define Flag
Bit1: Input Buffer Full Flag (By LRESET_N Pin to reset)
1: Full, 0: Empty
Bit0: Output Buffer Full Flag
1: Full, 0: Empty
6.2.1.2 Data Bus Buffer 0 Register (DBB0) (Default Value: 0000_0000)
Write data to output buffer, and read data from input buffer.
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