W83L951DG Datasheet, PDF (33/112 Pages) Winbond – Mobile Keyboard and Embedded Controller

W83L951DG/W83L951FG
6. FUNCTIONAL DESCRIPTION
In W83L951DG/FG, memory organization and data type are based on Turbo 51 core controller.
Register sets of various function blocks are finished by accessing Special Function Register (SFR).
According to the difference of accessing approaches, SFR are divided into Address Mapping and
External RAM Address Mapping.
Internal RAM Address Mapping:
It means to use direct addressing to access 128 bytes from internal RAM address 80H to 0FFH.
Function blocks that use Internal RAM Address Mapping are listed below:
Table 6-1 Reset Source Table
NAME
8051 Core
Internal Interrupt Controller
PS2 Device Interface
Low Pin Count Interface Controller
SMBus 1
SMBus 2
GPIO Controller
RESET SOURCE
System Reset.
System Reset
System Reset + PS2 Reset
System Reset + LPC Power Fail + LPC Reset
System Reset + SMBUS1 Reset
System Reset + SMBUS2Reset
System Reset.
Table 6-2 Internal RAM Address Mapping Table
Base
on 00h
Offset
80
88
90
98
A0
A8
B0
B8
C0
C8
D0
D8
E0
E8
F0
F8
Index +
8
Index
0
+GP0
+GP1
+GP2
+GP3
+GP4
+GP5
+GP6
+GP7
+GP8
+GP9
+PSW
+GPA
+ACC
+GPB
+B
+GPC
1
SP
CHIPCTRL1
KBCCON
DBB1STS
KPS2DATA
APS2DATA
S1CR
S1MFIFOSTS
S2CR
S2MFIFOSTS
GPD0
GPD7
IE1
IREQ1
IP1
FCON
2
DPL1
CHIPCTRL2
LPCCON
DBB1
KPS2CON
APS2CON
S1IREQ
S1SFIFO
S2IREQ
S2SFIFO
GPD1
GPD8
IE2
IREQ2
IP2
FADDH
8
9
A
3
DPH1
CHIPCTRL3
DBB0STS
DBB1ADDH
KPS2STS
APS2STS
S1IE
S1SCON
S2IE
S2SCON
GPD2
GPD9
IE3
IREQ3
IP3
FADDL
B
Read Only
Reserved
4
DPL2
DPSEL
DBB0
DBB1ADDL
MPS2DATA
DPH2
INTEN
DBB0ADDH
SIRQ1
MPS2CON
6
ID
MMEN
DBB0ADDL
MPS2STS
S1FIFOCON S1MFIFO
S1SSTS
S1SFIFOSTS
S2FIFOCON S2MFIFO
S2SSTS
S2SFIFOSTS
GPD3
GPD4
GPDA
GPDB
IE4
IREQ4
IP4
FDATA
C
S1MCON
S2MCON
GPD5
GPDC
E
+ a bit addressable register
7
VERSION
SIRQ0
PS2HSEN
S1MSTS
S2MSTS
GPD6
F
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Publication Release Date: August 2006
Revision 1.0