W66910 Datasheet, PDF (65/81 Pages) Winbond – TE Mode ISDN S/T-Controller with Microprocessor Interface

Data Sheet
W66910 PCI ISDN S/T-Controller
TABLE 8.4 REGISTER SUMMARY: B1 CHANNEL HDLC
Offset R/W
Name
20 R B1_RFIFO
21 W B1_XFIFO
22 R/W B1_CMDR
23 R/W B1_MODE
24 R_clr B1_EXIR
25 R/W B1_EXIM
26 R B1_STAR
27 R/W B1_ADM1
28 R/W B1_ADM2
29 R/W B1_ADR1
2A R/W B1_ADR2
2B R B1_RBCL
2C R B1_RBCH
2D R/W B1_IDLE
7
RACK
MMS
MA17
MA27
RA17
RA27
RBC7
IDLE7
6
RRST
ITF
RMR
RMR
RDOV
MA16
MA26
RA16
RA26
RBC6
IDLE6
5
RACT
EPCM
RME
RME
CRCE
MA15
MA25
RA15
RA25
RBC5
LOV
IDLE5
4
3
2
1
XACTB B1_128K XMS
B1_SW1 B1_SW0 SW56
RDOV
RDOV
RMB
XDOW
MA14 MA13 MA12
MA24 MA23 MA22
RA14 RA13 RA12
RA24 RA23 RA22
RBC4 RBC3 RBC2
RBC12 RBC11 RBC10
IDLE4 IDLE3 IDLE2
XME
FTS1
XFR
XFR
MA11
MA21
RA11
RA21
RBC1
RBC9
IDLE1
0
XRST
FTS0
XDUN
XDUN
XBZ
MA10
MA20
RA10
RA20
RBC0
RBC8
IDLE0
8.2.1 B1_ch receive FIFO B1_RFIFO
Read
Address 20H
The B1_RFIFO is a 128-byte depth FIFO memory with programmable threshold. The threshold value determines when to
generate an interrupt.
When more than a threshold length of data has been received, a RMR interrupt is generated. After an RMR interrupt, 64 or 96
bytes can be read out, depending on the threshold setting.
In transparent mode, when the end of frame has been received, a RME interrupt is generated. After an RME interrupt, the
number of bytes available is less than or equal to the threshold value.
8.2.2 B1_ch transmit FIFO
B1_XFIFO
Write
Address 21H
The B1_XFIFO is a 128-byte depth FIFO with programmable threshold value. The threshold setting is the same as B1_RFIFO.
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Publication Release Date: Feb,2001
Revision 1.0