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W25Q256JVEIQ-TR Datasheet, PDF (34/92 Pages) Winbond – 3V 256M-BIT SERIAL FLASH MEMORY WITH DUAL/QUAD SPI
W25Q256JV
The W25Q256JV is also backward compatible to Winbond’s previous generations of serial flash
memories, in which the Status Register-1&2 can be written using a single “Write Status Register-1 (01h)”
command. To complete the Write Status Register-1&2 instruction, the /CS pin must be driven high after
the sixteenth bit of data that is clocked in as shown in Figure 9b. If /CS is driven high after the eighth
clock, the Write Status Register-1 (01h) instruction will only program the Status Register-1, the Status
Register-2 will not be affected (Previous generations will clear CMP and QE bits).
/CS
CLK
Mode 3
Mode 0
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 Mode 3
Mode 0
DI
(IO0)
DO
(IO1)
* = MSB
Instruction (01h)
Status Register 1 in
Status Register 2 in
7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8
*
*
High Impedance
Figure 9b. Write Status Register-1/2 Instruction
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