W25Q256JVEIQ-TR Datasheet, PDF (14/92 Pages) Winbond – 3V 256M-BIT SERIAL FLASH MEMORY WITH DUAL/QUAD SPI

W25Q256JV
6.1.5 Software Reset & Hardware /RESET pin
The W25Q256JV can be reset to the initial power-on state by a software Reset sequence in SPI mode.
This sequence must include two consecutive commands: Enable Reset (66h) & Reset (99h). If the
command sequence is successfully accepted, the device will take approximately 30uS (tRST) to reset. No
command will be accepted during the reset period.
For the SOIC-16 and TFBGA package, W25Q256JV provides a dedicated /RESET pin. Drive the /RESET
pin low for a minimum period of ~1us (tRESET*) will reset the device to its initial power-on state.
Hardware /RESET pin has the highest priority among all the input signals. Drive /RESET low for a
minimum period of ~1us (tRESET*) will interrupt any on-going external/internal operations, regardless the
status of other SPI signals (/CS, CLK, IOs).
Note:
1.While a faster /RESET pulse (as short as a few hundred nanoseconds) will often reset the device, a
1us minimum pulse is recommended to ensure reliable operation.
2.There is an internal pull-up resistor for the dedicated /RESET pin on the SOIC-16 package. If the reset
function is not used, this pin can be left floating in the system.
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