W25Q256JVEIQ-TR Datasheet, PDF (2/92 Pages) Winbond – 3V 256M-BIT SERIAL FLASH MEMORY WITH DUAL/QUAD SPI

W25Q256JV
Table of Contents
1. GENERAL DESCRIPTIONS............................................................................................................. 5
2. FEATURES ....................................................................................................................................... 5
3. PACKAGE TYPES AND PIN CONFIGURATIONS........................................................................... 6
3.1 Pad Configuration WSON 8x6-mm ...................................................................................... 6
3.2 Pad Description WSON 8x6-mm.......................................................................................... 6
3.3 Pin Configuration SOIC 300-mil ........................................................................................... 7
3.4 Pin Description SOIC 300-mil ............................................................................................... 7
3.5 Ball Configuration TFBGA 8x6-mm (5x5 or 6x4 Ball Array) ................................................. 8
3.6 Ball Description TFBGA 8x6-mm ......................................................................................... 8
4. PIN DESCRIPTIONS ........................................................................................................................ 9
4.1 Chip Select (/CS) .................................................................................................................. 9
4.2 Serial Data Input, Output and IOs (DI, DO and IO0, IO1, IO2, IO3)..................................... 9
4.3 Serial Clock (CLK) ................................................................................................................ 9
4.4 Reset (/RESET) .................................................................................................................... 9
5. BLOCK DIAGRAM .......................................................................................................................... 10
6. FUNCTIONAL DESCRIPTIONS ..................................................................................................... 11
6.1 SPI Operations ................................................................................................................... 11
6.1.1 Standard SPI Instructions .....................................................................................................11
6.1.2 Dual SPI Instructions ............................................................................................................11
6.1.3 Quad SPI Instructions...........................................................................................................11
6.1.4 3-Byte / 4-Byte Address Modes ............................................................................................12
6.1.5 Software Reset & Hardware /RESET pin..............................................................................13
6.2 Write Protection .................................................................................................................. 14
7. STATUS AND CONFIGURATION REGISTERS ............................................................................ 15
7.1 Status Registers ................................................................................................................. 15
7.1.1 Erase/Write In Progress (BUSY) – Status Only ................................................................15
7.1.2 Write Enable Latch (WEL) – Status Only ..........................................................................15
7.1.3 Block Protect Bits (BP3, BP2, BP1, BP0) – Volatile/Non-Volatile Writable .......................16
7.1.4 Top/Bottom Block Protect (TB) – Volatile/Non-Volatile Writable .......................................16
7.1.5 Complement Protect (CMP) – Volatile/Non-Volatile Writable............................................16
7.1.6 Status Register Protect (SRL) – Volatile/Non-Volatile Writable ........................................16
7.1.7 Erase/Program Suspend Status (SUS) – Status Only.......................................................17
7.1.8 Security Register Lock Bits (LB3, LB2, LB1) – Volatile/Non-Volatile OTP Writable ..........17
7.1.9 Quad Enable (QE) – Volatile/Non-Volatile Writable ..........................................................17
7.1.10 Current Address Mode (ADS) – Status Only ...................................................................18
7.1.11 Power-Up Address Mode (ADP) – Non-Volatile Writable ................................................18
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