English
Language : 

THS8200-EP Datasheet, PDF (85/104 Pages) Texas Instruments – All-Format Oversampled Component Video/PC Graphics D/A System With Three 11-Bit DACs, CGMS Data Insertion
THS8200-EP
www.ti.com
6 Application Information
SLES253 – DECEMBER 2009
6.1 Video vs Computer Graphics Application
THS8200 is a highly integrated and flexible universal analog component video/graphics generator that can
be used in any application requiring D/A conversion of video/graphics signals.
In a typical video application (e.g., DVD player, set-top box), the THS8200 receives its input from an
MPEG decoder or media processor engine and converts the signal into the analog domain, thereby
generating the correct timing/frame format for the selected format.
Its ITU-R.BT656 output port could be used to connect to an NTSC/PAL video encoder, such as the Texas
Instruments TVP6000, for regular composite/S-video output.
Note that because the DAC speed is rated up to 205 MSPS, all popular SDTV and HDTV formats,
including 1080I and 720P, are supported in both 1× and 2× interpolated modes. The 1080P is supported
at the 1× rate.
Signal Receiver
(From Satellite,
Cable, DVD Disk)
MPEG Decoder
or
Media
Processor
THS8200
CCIR656
R/Y
G/Pb
B/Pr
HDTV
Monitor
NTSC/PAL
Video Encoder
SDTV
(NTSC/PAL)
Figure 6-1. Typical Video Application
Because of its programmable Hsync/Vsync outputs, the on-chip support for RGB as well as YCbCr color
spaces and its internal color space conversion circuit, and the DAC operational speed of 205 MSPS, all
PC graphics formats are supported as well, up to UXGA at 75 Hz. Video interpolation is now bypassed so
that the full 205 MSPS can be used for the 1× pixel clock.
R
3-D/2-D
Graphics
24 Bits
THS8200
G
Controller
B
VESA
Compatible
CRT Monitor
HS_OUT
VS_OUT
Figure 6-2. Computer Graphics Application
6.2 DVI to Analog YPbPr/RGB Application
Together with a DVI receiver, this device forms a two-chip solution to convert video or graphics formats
sent over a DVI interface to an analog RGB or YPbPr format using embedded composite sync or separate
Hsync, Vsync. THS8200 connects gluelessly to a DVI receiver using its data input bus and HS_IN and
VS_IN terminals. TI DVI 1.0 (with HDCP) receivers provide a data enable (DE) signal that is high during
Copyright © 2009, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Link(s): THS8200-EP
Application Information
85