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THS8200-EP Datasheet, PDF (76/104 Pages) Texas Instruments – All-Format Oversampled Component Video/PC Graphics D/A System With Three 11-Bit DACs, CGMS Data Insertion
THS8200-EP
SLES253 – DECEMBER 2009
www.ti.com
{dac_cntl_msb 0x3D(1:0) and
dac3_cntl_lsb 0x40(7:0)}
Direct input to R/Cr DAC
[00 0000 0000]
5.1.7 Clip/Scale/Multiplier Control (Sub-Addresses 0x41−0x4F)
csm_clip_gy_low(7:0):
G/Y low clipping value
{csm_clip_gy_low 0x41(7:0)}
[0100 0000]
Sets the value at which low end clipping occurs on G/Y channel, if clipping is enabled. Range is
0−255.
csm_clip_bcb_low(7:0):
B/Cb low clipping value
{csm_clip_bcb_low 0x42(7:0)}
[0100 0000]
Sets the value at which low end clipping occurs on B/Cb channel, if clipping is enabled. Range is
0−255.
csm_clip_rcr_low(7:0):
R/Cr low clipping value
{csm_clip_rcr_low 0x43(7:0)}
[0100 0000]
Sets the value at which low end clipping occurs on R/Cr channel, if clipping is enabled. Range is
0−255.
csm_clip_gy_high(7:0):
G/Y high clipping value
{csm_clip_gy_high 0x44(7:0)}
[0101 0011]
Sets the value at which high end clipping occurs on G/Y channel, if clipping is enabled.
High clip value = 1023-csm_clip_gy_high
csm_clip_bcb_high(7:0):
B/Cb high clipping value
{csm_clip_bcb_high 0x45(7:0)}
[0011 1111]
Sets the value at which high end clipping occurs on B/Cb channel, if clipping is enabled.
High clip value = 1023−csm_clip_bcb_high
csm_clip_rcr_high(7:0):
R/Cr high clipping value
{csm_clip_rcr_high 0x46(7:0)}
[0011 1111]
Sets the value at which high end clipping occur on R/Cr channel, if clipping is enabled.
High clip value = 1023−csm_clip_rcr_highs
csm_shift_gy(7:0):
G/Y shift value
{csm_shift_gy 0x47(7:0)}
[0100 0000]
Value that G/Y data is shifted downwards. Range 0−255. Note: it is possible to shift the data so
much that a roll over condition occurs.
csm_shift_bcb(7:0):
B/Cb shift value
{csm_shift_bcb 0x48(7:0)}
[0100 0000]
Value that B/Cb data is shifted downwards. Range: 0−255. Note: It is possible to shift the data so
much that a roll over condition occurs.
csm_shift_rcr(7:0):
{csm_shift_rcr 0x49(7:0)}
R/Cr shift value
[0100 0000]
76
I2C Register Map
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