THS8200-EP Datasheet, PDF (23/104 Pages) Texas Instruments – All-Format Oversampled Component Video/PC Graphics D/A System With Three 11-Bit DACs, CGMS Data Insertion

THS8200-EP
www.ti.com
SLES253 – DECEMBER 2009
• 20-bit 4:2:2: 1× pixel clock. 4:2:2 to 4:4:4 interpolation should be switched in, and is available for
formats with pixel clock up to 150 MHz. Optional 2× oversampling available for formats with pixel clock
up to 80 MHz.
• 10-bit 4:2:2 (ITU): 1/2× pixel clock. 4:2:2 to 4:4:4 interpolation should be switched in, and is available
for formats with pixel clock up to 150 MHz. Optional 2× oversampling is available for formats with pixel
clock up to 80 MHz.
The internal DLL (delay-locked loop) generates the higher clock frequencies. The user should program the
input frequency range selection register, dll_freq_sel, according to the frequency present on CLK_IN when
using either or both interpolation/oversampling stages.
The 4:2:2 to 4:4:4 stage is switched in or bypassed, depending on the setting of data_ifir12_bypass
register (interpolation only on chroma channels). This feature should only be used with YCbCr 4:2:2 input.
The THS8200 can perform color space conversion to RGB depending on the CSC setting. The
dtg2_rgbmode_on register should be set corresponding to the color space representation of the DAC
output.
The 2× oversampling stage is switched in or bypassed, depending on the setting of data_ifir35_bypass
register.
The user should not enable the 2× oversampling stage when the CLK_IN frequency exceeds 80 MHz, as
is the case for the higher PC graphics formats and 1080P HDTV. In this case the DLL should be bypassed
using the vesa_clk register to disable the 2× frequency generation. As explained in the detailed register
map description for this register, it is still possible to support 20-bit 4:2:2 input in this mode (e.g., for
1080P).
A second bypass mode operation exists for the DLL, enabled by the dll_bypass register. When this
bypass mode is active, the CLKIN input is assumed to be 2× pixel frequency. This mode is meant only for
test purposes as it does not correspond to any mode in the supported input formats table.
Copyright © 2009, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Link(s): THS8200-EP
Detailed Functional Description
23