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LP3918 Datasheet, PDF (7/39 Pages) National Semiconductor (TI) – Battery Charge Management and Regulator Unit
LP3918
www.ti.com
SNVS476D – AUGUST 2007 – REVISED MAY 2013
General Electrical Characteristics
Unless otherwise noted, VIN ( = VIN1 = VIN2 = BATT) = 3.6V, GND = 0V, CVIN1-2=10µF, CLDOX=1µF. Typical values and limits
appearing in normal type apply for TJ = 25°C. Limits appearing in boldface type apply over the entire junction temperature
range for operation, Ta = TJ = −40°C to +125°C. (1)
Symbol
Parameter
Condition
Limit
Typ
Units
Min
Max
IQ(STANDBY)
Standby Supply Current
VIN= 3.6V, UVLO on, internal
logic circuit on, all other
2
circuits off
10
µA
Power Monitor Functions
Battery Under-Voltage Lockout
VUVLO-R
Thermal Shutdown
Under Voltage Lock-out
TSD Threshold
VIN Rising
(2)
2.85
2.7
3.0
V
160
°C
LOGIC AND CONTROL INPUTS (LDO2 at 3.0V)
VIL
Input Low Level
PS_HOLD, SDA, SCL,
RX_EN, TCXO_EN, TX_EN
0.25×VLDO2
V
PWR_ON, HF_PWR
0.25×VBATT
V
VIH
Input High Level
PS_HOLD, SDA, SCL,
0.75×VLDO2
V
RX_EN, TCXO_EN, TX_EN
PWR_ON, HF_PWR
IIL
Logic Input Current
All logic inputs except
PWR_ON and HF_PWR
0.75×VBATT
V
-5
+5
µA
0V ≤ VINPUT ≤ VBATT
RIN
Input Resistance
PWR_ON, HF_PWR Pull-
500
kΩ
Down resistance to GND(2)
LOGIC AND CONTROL OUTPUTS (LDO2 at 3.0V)
VOL
Output Low Level
PON_N, RESET_N, SDA,
ACOK_N
0.25×VLDO2
V
IOUT = 2mA
VOH
Output High Level
PON_N, RESET_N,
ACOK_N
0.75×VLDO2
V
IOUT = 2mA
(Not applicable to Open
Drain Output SDA)
(1) All electrical characteristics having room-temperature limits are tested during production with TJ = 25°C. All hot and cold limits are
specified by correlating the electrical characteristics to process and temperature variations and applying statistical process control.
(2) Specified by design. Not production tested.
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