LP3918 Datasheet, PDF (17/39 Pages) National Semiconductor (TI) – Battery Charge Management and Regulator Unit

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LP3918
SNVS476D – AUGUST 2007 – REVISED MAY 2013
Device Power Up and Shutdown Timing
Figure 4. Device Power Up Logic Timing. PWR_ON
PWR_ON
30 ms Debounce time
PWR_HOLD needs to be asserted while
PWR_ON is high.
PS_HOLD
LDO1
LDO2
RESET
LDO3
LDO7
RX_EN, TX_EN,
TCXO_EN
LDO4,5,6
87% Reg
< 200 Ps
87% Reg
60 ms
I2C Control
Note: Serial I/F commands only take place
after PS_HOLD is asserted.
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