LP3918 Datasheet, PDF (19/39 Pages) National Semiconductor (TI) – Battery Charge Management and Regulator Unit

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LP3918
SNVS476D – AUGUST 2007 – REVISED MAY 2013
Figure 6. LP3918 Power On Behaviour (Failed PS_Hold)
If charger is connected (CHG_IN) or HF_PWR is
applied, then both events are filtered for 320 ms
320 ms _{before enabling LDO1}
CHG_IN
HF_PWR
PS_HOLD needs to be asserted within 1200 ms
after HF_PWR, or CHG_IN rising edge has been
detected.
1.2s
Either HF_PWR or CHG_IN will enable LDO1
PS_HOLD
If no enabling signal is high on
the rising edge of PS_HOLD,
shutdown will occur.
LDO1
LDO2
87%
200 Ps
87% Reg
60 ms
RESET
Figure 7. LP3918 Normal Shutdown Behaviour
35 ms
PS_HOLD
RESET
LDO2 - 7
LDO1
If PS_HOLD is low 35 ms after initially going low,
then LDO2-7 are shutdown
40 Ps
LDO1 is shutdown 40 Ps after other
LDO's are shutdown
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