LP3918 Datasheet, PDF (15/39 Pages) National Semiconductor (TI) – Battery Charge Management and Regulator Unit

LP3918
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8h'05
8h'06
8h'07
8h'08
8h'09
8h'0A
8h'0B
8h'0C
8h'0D
8h'0E
8h'0F
2.7
2.75
2.8
2.85
2.9
2.95
3.0
3.05
3.1
3.2
3.3
2.7
2.75
2.8
2.85
2.9
2.95
3.0
3.05
3.1
3.2
3.3
2.7
2.75
2.8
2.85
2.9
2.95
3.0
3.05
2.7
2.75
2.8
2.85
2.9
2.95
3.0
3.05
3.1
3.2
3.3
SNVS476D – AUGUST 2007 – REVISED MAY 2013
2.7
2.7
2.7
2.75
2.75
2.75
2.8
2.8
2.8
2.85
2.85
2.85
2.9
2.9
2.9
2.95
2.95
2.95
3.0
3.0
3.0
3.05
3.05
3.05
3.1
3.2
3.3
Charger Control Register 2
Note that Bits 7,6,5 are not used and must be set to 0 during write to this register.
CHARGER CURRENT PROGRAMMING
The following table summarizes the supported charging current values for the LP3918.
Default charge current after startup is highlighted in bold
Address
8h'11
Address
8h'11
Address
8h'11
Register ID
CHGCNTL2
Register ID
CHGCNTL2
Register ID
CHGCNTL2
Table 4. LP3918 Charger Current Programming
00000
50mA
00111
400mA
01110
750mA
Current Selection Prog_ICHG<4..0> Bit 0 to Bit 4
00001
00010
00011
00100
00101
100mA
150mA
200mA
250mA
300mA
Current Selection Prog_ICHG<4..0> Bit 0 to Bit 4
01000
01001
01010
01011
01100
450mA
500mA
550mA
600mA
650mA
Current Selection Prog_ICHG<4..0> Bit 0 to Bit 4
01111
10000
10001
10010
800mA
850mA
900mA
950mA
00110
350mA
01101
700mA
Charger Control Register 3
CHARGER TERMINATION VOLTAGE PROGRAMMING
Address
8h'12
Table 5. LP3918 Charger Termination Voltage Control
Register ID
CHGCNTL3
VTERM[1]
CHGCNTL3<5>
0
0
1
1
V_TERM Selection Bits
VTERM[0]
CHGCNTL3<4>
0
1
0
1
Termination Voltage(V)
4.1
4.2 (Default)
4.3
4.4
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