MSP430FG439 Datasheet, PDF (5/88 Pages) Texas Instruments – Mixed-Signal Microcontrollers

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MSP430FG439, MSP430FG438, MSP430FG437
SLAS380D – APRIL 2004 – REVISED NOVEMBER 2014
3 Device Comparison
The following table summarizes the available family members.
Table 3-1. Device Comparison⁽¹⁾⁽²⁾
Device
FLASH SRAM
(KB)
(KB)
ADC12
DAC12 Comp_A Timer_A⁽³⁾ Timer_B⁽⁴⁾ USART
LCD
I/Os
Package
Type
MSP430FG439
60
2
12
channels
2 channels
16
channels
3
3
Yes
Yes
48
80 PN
113 ZCA
MSP430FG438
48
2
12
channels
2 channels
16
channels
3
3
Yes
Yes
48
80 PN
113 ZCA
MSP430FG437
32
1
12
channels
2 channels
16
channels
3
3
Yes
Yes
48
80 PN
113 ZCA
(1) For the most current package and ordering information, see the Package Option Addendum in Section 8, or see the TI web site at
www.ti.com.
(2) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/packaging.
(3) Each number in the sequence represents an instantiation of Timer_A with its associated number of capture/compare registers and PWM
output generators available. For example, a number sequence of 3, 5 would represent two instantiations of Timer_A, the first
instantiation having 3 capture/compare registers and PWM output generators and the second instantiation having 5 capture/compare
registers and PWM output generators, respectively.
(4) Each number in the sequence represents an instantiation of Timer_B with its associated number of capture/compare registers and PWM
output generators available. For example, a number sequence of 3, 5 would represent two instantiations of Timer_B, the first
instantiation having 3 capture/compare registers and PWM output generators and the second instantiation having 5 capture/compare
registers and PWM output generators, respectively.
Copyright © 2004–2014, Texas Instruments Incorporated
Device Comparison
5
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