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MSP430FG439 Datasheet, PDF (3/88 Pages) Texas Instruments – Mixed-Signal Microcontrollers
www.ti.com
MSP430FG439, MSP430FG438, MSP430FG437
SLAS380D – APRIL 2004 – REVISED NOVEMBER 2014
Table of Contents
1 Device Overview ......................................... 1
1.1 Features .............................................. 1
1.2 Applications........................................... 1
1.3 Description............................................ 1
1.4 Functional Block Diagram ............................ 2
2 Revision History ......................................... 4
3 Device Comparison ..................................... 5
4 Terminal Configuration and Functions.............. 6
4.1 Pin Diagrams ......................................... 6
4.2 Signal Descriptions ................................... 8
5 Specifications ........................................... 12
5.1 Absolute Maximum Ratings ........................ 12
5.2 Handling Ratings .................................... 12
5.3 Recommended Operating Conditions............... 12
5.4 Supply Current Into AVCC + DVCC Excluding
External Current .................................... 14
5.5 Schmitt-Trigger Inputs – Ports P1 to P6, RST/NMI,
JTAG (TCK, TMS, TDI/TCLK, TDO/TDI) ........... 15
5.6 Inputs Px.y, TAx, TBx ............................... 15
5.7 Leakage Current – Ports P1 to P6 ................. 15
5.8 Outputs – Ports P1 to P6 ........................... 16
5.9 Output Frequency ................................... 16
5.10 Typical Characteristics – Outputs ................... 17
5.11 Wake-Up From LPM3 ............................... 18
5.12 RAM ................................................. 18
5.13 LCD.................................................. 18
5.14 Comparator_A ...................................... 19
5.15 Comparator_A Typical Characteristics.............. 19
5.16 Power-On Reset (POR) and Brownout Reset (BOR)
...................................................... 21
5.17 Supply Voltage Supervisor (SVS) and Supply
Voltage Monitor (SVM) ............................. 22
5.18 DCO ................................................. 24
5.19 Crystal Oscillator, XT1 Oscillator ................... 26
5.20 Crystal Oscillator, XT2 Oscillator ................... 26
5.21 USART0 ............................................ 26
5.22 12-Bit ADC, Power Supply and Input Range
Conditions .......................................... 27
5.23 12-Bit ADC, External Reference ................... 27
5.24 12-Bit ADC, Built-In Reference...................... 28
5.25 12-Bit ADC, Timing Parameters .................... 30
5.26 12-Bit ADC, Linearity Parameters................... 30
5.27 12-Bit ADC, Temperature Sensor and Built-In VMID 31
5.28 12-Bit DAC, Supply Specifications .................. 31
5.29 12-Bit DAC, Linearity Specifications ................ 32
5.30 12-Bit DAC, Output Specifications .................. 34
5.31 12-Bit DAC, Reference Input Specifications ........ 35
5.32 12-Bit DAC, Dynamic Specifications ................ 35
5.33 12-Bit DAC, Dynamic Specifications (Continued)... 36
5.34 Operational Amplifier (OA), Supply Specifications.. 37
5.35 Operational Amplifier (OA), Input/Output
Specifications........................................ 37
5.36 Operational Amplifier (OA), Dynamic Specifications 38
5.37 OA Dynamic Specifications Typical Characteristics 38
5.38 Flash Memory ....................................... 39
5.39 JTAG Interface ...................................... 39
5.40 JTAG Fuse ......................................... 39
6 Detailed Description ................................... 40
6.1 CPU ................................................. 40
6.2 Instruction Set....................................... 41
6.3 Operating Modes.................................... 42
6.4 Interrupt Vector Addresses.......................... 43
6.5 Special Function Registers (SFRs) ................. 44
6.6 Memory Organization ............................... 46
6.7 Bootstrap Loader (BSL) ............................. 47
6.8 Flash Memory ....................................... 47
6.9 Peripherals .......................................... 48
6.10 Input/Output Schematics ............................ 55
7 Device and Documentation Support ............... 78
7.1 Device Support ...................................... 78
7.2 Documentation Support ............................. 80
7.3 Trademarks.......................................... 80
7.4 Electrostatic Discharge Caution..................... 80
7.5 Glossary ............................................. 80
8 Mechanical Packaging and Orderable
Information .............................................. 81
8.1 Packaging Information .............................. 81
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