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MSP430FG439 Datasheet, PDF (49/88 Pages) Texas Instruments – Mixed-Signal Microcontrollers
www.ti.com
MSP430FG439, MSP430FG438, MSP430FG437
SLAS380D – APRIL 2004 – REVISED NOVEMBER 2014
6.9.6 LCD Drive
The LCD driver generates the segment and common signals required to drive an LCD display. The LCD
controller has dedicated data memory to hold segment drive information. Common and segment signals
are generated as defined by the mode. Static, 2-MUX, 3-MUX, and 4-MUX LCDs are supported by this
peripheral.
6.9.7 OA
The MSP430FG43x has three configurable low-current general-purpose operational amplifiers. Each OA
input and output terminal is software-selectable and offers a flexible choice of connections for various
applications. The OA op amps primarily support front-end analog signal conditioning prior to analog-to-
digital conversion.
6.9.8 Watchdog Timer (WDT)
The primary function of the WDT module is to perform a controlled system restart after a software problem
occurs. If the selected time interval expires, a system reset is generated. If the watchdog function is not
needed in an application, the module can be configured as an interval timer and can generate interrupts at
selected time intervals.
6.9.9 USART0
The MSP430FG43x has one hardware universal synchronous/asynchronous receive transmit (USART)
peripheral module that is used for serial data communication. The USART supports synchronous SPI (3 or
4 pin) and asynchronous UART communication protocols, using double-buffered transmit and receive
channels.
6.9.10 Timer_A3
Timer_A3 is a 16-bit timer/counter with three capture/compare registers. Timer_A3 can support multiple
capture/compares, PWM outputs, and interval timing. Timer_A3 also has extensive interrupt capabilities.
Interrupts may be generated from the counter on overflow conditions and from each of the
capture/compare registers.
INPUT PIN NUMBER
ZCA
PN
B10 - P1.5
62 - P1.5
B10 - P1.5
D8 - P1.0
D9 - P1.1
62 - P1.5
67 - P1.0
66 - P1.1
B9 - P1.2
65 - P1.2
C11 - P2.0
59 - P2.0
Table 6-10. Timer_A3 Signal Connections
DEVICE INPUT MODULE
SIGNAL
INPUT NAME
TACLK
ACLK
SMCLK
TACLK
TA0
TA0
DVSS
DVCC
TA1
CAOUT
(internal)
DVSS
DVCC
TA2
ACLK (internal)
DVSS
DVCC
TACLK
ACLK
SMCLK
INCLK
CCI0A
CCI0B
GND
VCC
CCI1A
CCI1B
GND
VCC
CCI2A
CCI2B
GND
VCC
MODULE
BLOCK
Timer
CCR0
CCR1
CCR2
MODULE
OUTPUT
SIGNAL
NA
TA0
TA1
TA2
OUTPUT PIN NUMBER
PN
ZCA
67 - P1.0
D8 - P1.0
65 - P1.2
ADC12
(internal)
B9 - P1.2
59 - P2.0
C11 - P2.0
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Detailed Description
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