MSP430FG439 Datasheet, PDF (2/88 Pages) Texas Instruments – Mixed-Signal Microcontrollers

MSP430FG439, MSP430FG438, MSP430FG437
SLAS380D – APRIL 2004 – REVISED NOVEMBER 2014
1.4 Functional Block Diagram
Figure 1-1 shows the functional block diagram.
XIN XOUT
DV_CC1/2 DV_SS1/2 AV_CC AV_SS
P1
8
P2
8
P3
8
XT2IN
XT2OUT
Oscillator
FLL+
MCLK
ACLK
SMCLK
Flash
60KB
48KB
32KB
8 MHz
CPU
incl. 16
Registers
MAB
MDB
RAM
2KB
1KB
ADC12
12-Biit
12 Channels
<10µs Conv.
DAC12
12-Bit
2 Channels
Voltage Out
Port 1
8 I/O
Interrupt
Capability
Port 2
8 I/O
Interrupt
Capability
Port 3
8 I/O
P4
8
Port 4
8 I/O
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P5
8
P6
8
Port 5
8 I/O
Port 6
8 I/O
Emulation
Module
JTAG
Interface
POR/
SVS/
Brownout
DMA
Controller
1 Channel
Watchdog
Timer
WDT
15/16-Bit
Timer_B3
3 CC Reg
Shadow
Reg
Timer_A3
3 CC Reg
Comparator_
A
Basic
Timer 1
1 Interrupt
Vector
LCD
128
Segments
1,2,3,4 MUX
USART0
UART Mode
SPI Mode
OA0, OA1
OA2
3 Op Amps
f_LCD
RST/NMI
Figure 1-1. Functional Block Diagram
2
Device Overview
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