MSP430FG439 Datasheet, PDF (26/88 Pages) Texas Instruments – Mixed-Signal Microcontrollers

MSP430FG439, MSP430FG438, MSP430FG437
SLAS380D – APRIL 2004 – REVISED NOVEMBER 2014
www.ti.com
5.19 Crystal Oscillator, XT1 Oscillator^{(1) (2)}
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYP
MAX UNIT
C_XIN
Integrated input capacitance⁽³⁾
C_XOUT Integrated output capacitance⁽³⁾
V_IL
Input levels at XIN
V_IH
OSCCAPx = 0h, V_CC = 2.2 V, 3 V
OSCCAPx = 1h, V_CC = 2.2 V, 3 V
OSCCAPx = 2h, V_CC = 2.2 V, 3 V
OSCCAPx = 3h, V_CC = 2.2 V, 3 V
OSCCAPx = 0h, V_CC = 2.2 V, 3 V
OSCCAPx = 1h, V_CC = 2.2 V, 3 V
OSCCAPx = 2h, V_CC = 2.2 V, 3 V
OSCCAPx = 3h, V_CC = 2.2 V, 3 V
V_CC = 2.2 V, 3 V⁽⁴⁾
V_SS
0.8 × V_CC
0
10
pF
14
18
0
10
pF
14
18
0.2 × V_CC
V
V_CC
(1) The parasitic capacitance from the package and board may be estimated to be 2 pF. The effective load capacitor for the crystal is (C_XIN
× C_XOUT) / (C_XIN+ C_XOUT). This is independent of XTS_FLL.
(2) To improve EMI on the low-power LFXT1 oscillator, particularly in the LF mode (32 kHz), the following guidelines should be observed.
• Keep the trace between the device and the crystal as short as possible.
• Design a good ground plane around the oscillator pins.
• Prevent crosstalk from other clock or data lines into oscillator pins XIN and XOUT.
• Avoid running PCB traces underneath or adjacent to the XIN and XOUT pins.
• Use assembly materials and processes that avoid any parasitic load on the oscillator XIN and XOUT pins.
• If conformal coating is used, make sure that it does not induce capacitive or resistive leakage between the oscillator pins.
• Do not route the XOUT line to the JTAG header to support the serial programming adapter as shown in other documentation. This
signal is no longer required for the serial programming adapter.
(3) External capacitance is recommended for precision real-time clock applications, OSCCAPx = 0h.
(4) Applies only when using an external logic-level clock source. XTS_FLL must be set. Not applicable when using a crystal or resonator.
5.20 Crystal Oscillator, XT2 Oscillator⁽¹⁾
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYP
C_XT2IN Integrated input capacitance
C_XT2OUT Integrated output capacitance
V_IL
Input levels at XT2IN
V_IH
V_CC = 2.2 V, 3 V
V_CC = 2.2 V, 3 V
V_CC = 2.2 V, 3 V⁽²⁾
2
2
V_SS
0.8 × V_CC
(1) The oscillator needs capacitors at both terminals, with values specified by the crystal manufacturer.
(2) Applies only when using an external logic-level clock source. Not applicable when using a crystal or resonator.
MAX
0.2 × V_CC
V_CC
UNIT
pF
pF
V
V
5.21 USART0⁽¹⁾
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNIT
t_(τ)
USART0 deglitch time
V_CC = 2.2 V, SYNC = 0, UART mode
V_CC = 3 V, SYNC = 0, UART mode
200 430 800
ns
150 280 500
(1) The signal applied to the USART0 receive signal/terminal (URXD0) should meet the timing requirements of t_(τ) to ensure that the URXS
flip-flop is set. The URXS flip-flop is set with negative pulses meeting the minimum timing condition of t_(τ). The operating conditions to
set the flag must be met independently from this timing constraint. The deglitch circuitry is active only on negative transitions on the
URXD0 line.
26
Specifications
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