GC1115_06 Datasheet, PDF (75/82 Pages) Texas Instruments – Crest Factor Reduction Processor

GC1115
www.ti.com
SLWS144C – FEBRUARY 2005 – REVISED JUNE 2006
APPLICATION INFORMATION (continued)
1. Check the GC1115 power pins for proper voltage levels (VDD, VDDSHV, VDDA1, VDDA2, and VDD1).
2. Check IN_CLK pin to verify the expected GC1115 input sampling rate.
3. Pull TRST low and then high to start the GC1115.
4. Perform a write/read test of all GC1115 control registers.
5. Enable the GC1115's internal pattern generator to perform an internal checksum (CRC) test on the GC1115.
6. Enable the GC1115 to bypass all PDC stages, enable the internal pattern generator to generate a sawtooth
waveform, and verify that the sawtooth waveform is observed on the GC1115 OUT_A and OUT_B pins.
7. While driving the GC1115's IN_A and IN_B pins with a test input signal and while bypassing all PDC stages,
verify that the data on OUT_A and OUT_B pins matches the input data (adjusted for the internal GC1115
delay).
8. If the GC1115 is connected to a DAC, drive the IN_A and IN_B pins with a high-quality sine wave and verify
that the expected SNR is achieved at the DAC output.
9. Finally, after determining the proper threshold and cancellation pulse coefficients, enable the PDC stages
and drive the GC1115 with a test signal whose CCDF, ACLR, cEVM, and PCDE values can be measured by
suitable test equipment.
About the GC1115 JTAG Interface
• The GC1115 JTAG implementation supports both standard boundary scan (used for board test) and chip
identification commands. A BSDL file for the GC1115 is available on the TI web site,
http://focus.ti.com/docs/prod/folders/print/gc1115.html#productmodels.
• The GC1115 identification string is a 32-bit string:
Hex:
Binary:
0x8
1000
sync
0x8
0xC
1000
1100
mfr
0x1
0001
0x1
0x1
0001
0001
device ID
0x5
0101
0x1
0001
chip revision
• At GC1115 power-up, the state of the JTAG controller is indeterminate until after TRST is asserted.
• For GC1115 designs that do not use JTAG, TRST must be pulled low and then high during initial GC1115
RESET, disabling JTAG. All other JTAG pins can be left unconnected (open).
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