GC1115_06 Datasheet, PDF (34/82 Pages) Texas Instruments – Crest Factor Reduction Processor

GC1115
SLWS144C – FEBRUARY 2005 – REVISED JUNE 2006
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Functional Blocks and SYNC Registers
The operation of thirteen GC1115 functional blocks can be triggered by one of the SYNC sources:
• The receive block (GC1115 input) [use only SYNC_A or SYNC_B!]
• The pipeline stages [use only SYNC_A or SYNC_B!]
• The decimation function (to select a particular input sample phase) [use only SYNC_A or SYNC_B!]
• The software timer
• The PDC stage delay values (CANCEL_DELAY registers)
• The cancellation pulse coefficient shadow RAM
• The canceler RAM allocation variables (RESOURCE_CNT registers)
• The interpolate-by-4 block [use only SYNC_A or SYNC_B!]
• The output gain registers (OUT_GAIN0 and OUT_GAIN1)
• The SYNC_OUT pin (for debugging or for synchronizing multiple GC1115s)
• The signal generator functions
• Snapshot RAM A
• Snapshot RAM B
As shown in Table 16, SYNC selection registers control which SYNC source is assigned to each functional
block. Table 16 summarizes the SYNC source selection encoding, using the 3 LSBs of each SYNC register.
Table 16. SYNC Register Source Selection
SYNC SELECTION
NEVER
SW_TRIGGER
TIMER
SYNC_A
SYNC_B
ALWAYS
(reserved)
(reserved)
SYNC REGISTER VALUE
(3 LSBs)
0
1
2
3
4
5
6
7
34
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