GC5316 Datasheet, PDF (68/75 Pages) Texas Instruments – HIGH-DENSITY DIGITAL DOWNCONVERTER AND UPCONVERTER

GC5316
SLWS154A − JANUARY 2004 − REVISED MARCH 2004
6.3 Microprocessor Signals
SIGNAL NAME
d0
d1
d2
d3
d4
d5
d6
d7
d8
d9
d10
d11
d12
d13
d14
d15
a0
a1
a2
a3
a4
a5
rd_n
wr_n
ce_n
reset_n
interrupt
BALL DESIG
AD8
AE7
AF6
AC8
AD7
AE6
AF5
AC7
AD6
AE5
AF4
AD5
AE4
AF3
AC5
AD4
AB4
AD1
AC2
AB3
AA4
AC1
Y4
AA3
AB2
R24
AC3
TYPE
input/output
input/output
input/output
input/output
input/output
input/output
input/output
input/output
input/output
input/output
input/output
input/output
input/output
input/output
input/output
input/output
input
input
input
input
input
input
input
input
input
input
output
6.4 JTAG Signals
SIGNAL NAME BALL DESIG
tdi
N23
tms
M26
trst_n
M25
tck
M24
tdo
L26
TYPE
input
input
input
input
output
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DESCRIPTION
MPU register interface data bus LSB
MPU register interface data bus
MPU register interface data bus
MPU register interface data bus
MPU register interface data bus
MPU register interface data bus
MPU register interface data bus
MPU register interface data bus
MPU register interface data bus
MPU register interface data bus
MPU register interface data bus
MPU register interface data bus
MPU register interface data bus
MPU register interface data bus
MPU register interface data bus
MPU register interface data bus MSB
MPU register interface address bus LSB
MPU register interface address bus
MPU register interface address bus
MPU register interface address bus
MPU register interface address bus
MPU register interface address bus MSB
MPU register interface read – active low
MPU register interface write – active low
MPU register interface chip enable – active low
Chip reset – active low
Chip interrupt
DESCRIPTION
JTAG test data in
JTAG test mode select
JTAG test reset (same as trst – the “_n” is for consistency − being active low)
JTAG test clock
JTAG test data out
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