GC5316 Datasheet, PDF (54/75 Pages) Texas Instruments – HIGH-DENSITY DIGITAL DOWNCONVERTER AND UPCONVERTER

GC5316
SLWS154A − JANUARY 2004 − REVISED MARCH 2004
comp_pmeter0_count_lsb D 1C00
02
comp_pmeter0_count_msb D 1C00
03
comp_pmeter0_sync_delay D 1C00
03
comp_pmeter0_interval_lsb D 1C00
04
comp_pmeter0_interval_msb D 1C00
05
comp_pmeter1_count_lsb D 1C00
06
comp_pmeter1_count_msb D 1C00
07
comp_pmeter1_sync_delay D 1C00
07
comp_pmeter1_interval_lsb D 1C00
08
comp_pmeter1_interval_msb D 1C00
09
comp_pmeter2_count_lsb D 1C00
0A
comp_pmeter2_count_msb D 1C00
0B
comp_pmeter2_sync_delay D 1C00
0B
comp_pmeter2_interval_lsb D 1C00
0C
comp_pmeter2_interval_msb D 1C00
0D
comp_pmeter3_count_lsb D 1C00
0E
comp_pmeter3_count_msb D 1C00
0F
comp_pmeter3_sync_delay D 1C00
0F
comp_pmeter3_interval_lsb D 1C00
10
comp_pmeter3_interval_msb D 1C00
11
duc_counter_lsb
D 1C00
1A
duc_counter_msb
ssel_duc_counter
D 1C00
1B
U 1C00
1C
54
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0
16
0
This is the number of sample sets to
accumulate for a power measurement. Ia
and Qa (signal) are each squared and
accumulated. Each pair of I and Q are
equal to one integration count. The
accumulation interval is initiated when
the sync is asserted and the
programmed sync_delay has expired or
when the interval start time is reached.
When the integration count is reached,
the accumulated powers are made
available for MPU access and an
interrupt is generated. Bits 0−15
0
5
0
Bits 16−20 of the number of sample sets
to accumulate for a power measurement.
(Used in conjunction with the previous
variable.)
7
9
0
Programmable start delay from sync, in
eight output sample units.
0
16
0
This is the interval over which the
integration is restarted and must be
greater than the integration count. The
interval start counter and RMS power
accumulation is started at the sync pulse
after the programmed delay and every
time the interval counter reaches its limit.
Bits 0−15
0
5
0
Bits 16−20 of the interval over which the
integration is restarted. (Used in
conjunction with the previous variable.)
0
16
0
See description for pmeter0
0
5
0
See description for pmeter0
7
9
0
See description for pmeter0
0
16
0
See description for pmeter0
0
5
0
See description for pmeter0
0
16
0
See description for pmeter0
0
5
0
See description for pmeter0
7
9
0
See description for pmeter0
0
16
0
See description for pmeter0
0
5
0
See description for pmeter0
0
16
0
See description for pmeter0
0
5
0
See description for pmeter0
7
9
0
See description for pmeter0
0
16
0
See description for pmeter0
0
5
0
See description for pmeter0
0
16
65535 32-bit interval timer common to all DUC
sync inputs. This timer may be
programmed to any interval count, and
each DUC synchronization input can
select this counter as a source. This
counter increments on every TXCLK
rising edge. Bits 0−15
0
16
65535 Bits 16−31 of the above mentioned 32-bit
interval timer.
8
3
0
Selects the sync source for the DUC
sync counter.