GC5316 Datasheet, PDF (57/75 Pages) Texas Instruments – HIGH-DENSITY DIGITAL DOWNCONVERTER AND UPCONVERTER

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test_bits_1
E 0100
19
pmeter_sync_disable D 0100
19
ddc_duc_ena
mixer_gain
U 0100
19
U 0100
19
mpu_ram_read
E 0100
19
sumchn_sel_b
U 0100
19
sumchn_sel_a
U 0100
19
tst_sel_block
E 0100
1A
ssel_pmeter
U 0120
0B
ssel_serial
U 0120
0B
ssel_tadj_fine
U 0120
0C
ssel_tadj_coarse
U 0120
0C
ssel_gain
U 0120
0C
ssel_nco
U 0120
0D
ssel_dither
U 0120
0D
ssel_freq
U 0120
0D
ssel_phase
U 0120
0D
13
2
12
1
11
1
9
1
8
1
4
4
0
4
0
6
8
3
0
3
12
3
8
3
4
3
12
3
8
3
4
3
0
3
GC5316
SLWS154A − JANUARY 2004 − REVISED MARCH 2004
0
TEST BITS. Set to ’0’ for normal operation.
0
Turns off the sync to the channel power meter.
This can be used to individually turn off syncs to
a channels power meter, while still having syncs
to other power meters on the chip.
0
When set this turns on the DUC or DDC. When
unset, the clocks to this block are turned off.
0
Adds a fixed −6 dB of gain to the mixer
output(before round and limiting) when asserted.
Else adds −12-dB gain when deasserted.
0
(TESTING PURPOSES) Allows the coefficient
RAMs in the PFIR/CFIR to be read out the mpu
data bus. This cannot be done during normal
operation and must be done when the state of
the output data is not important. THIS BIT MUST
BE SET ONLY DURING THE READ
OPERATION.
2
This word controls the second set of additions for
the CDMA B signal in the sumchn output. The
selection bits are not mutually exclusive.
1
This word controls the first set of additions for the
CDMA A signal (or UMTS signal) in the sumchn
output. The selection bits are not mutually
exclusive.
0
(TESTING PURPOSES) This is the selection of
which signal comes out the test bus. When a
constant ‘0’ is selected this also reduces power
by preventing the data at the input of the test
block from changing. It does not stop the clock
however.
0
Selects the sync source for the channel power
meter.
0
Selects the sync source for the DUC and DDC
serial interface state machines.
0
Selects the sync source for the fine time adjust
decimation(DUC) or zero stuff(DDC) moment.
0
Selects the sync source for the course time
adjust delay selection.
0
Selects the sync source for the DUC gain
register or DDC AGC gain register.
0
Selects the sync source for the NCO
accumulator reset.
0
Selects the sync source for the NCO phase
dither generator reset.
0
Selects the sync source for the NCO frequency
register.
0
Selects the sync source for the NCO phase
offset register.
57