GC5316 Datasheet, PDF (58/75 Pages) Texas Instruments – HIGH-DENSITY DIGITAL DOWNCONVERTER AND UPCONVERTER

GC5316
SLWS154A − JANUARY 2004 − REVISED MARCH 2004
www.ti.com
5.1.8 DDC Channel Controls
These controls are used by the DDC channels. These follow the ddc <channel_number> keyword in the cmd5316
configuration file.
VARIABLE NAME
pmeter_integration_ddc
TYPE PAGE ADDRESS
D 0100
2
LSB
POSITION
0
pmeter_sync_delay_ddc D 0100
3
8
pmeter_interval_ddc
D 0100
3
0
cic_gain_ddc
U 0100
0E
5
test_ena
E 0100
19
10
agc_dbelow
D 0100
1D
12
agc_dabove
D 0100
1D
8
agc_dzero
D 0100
1D
4
agc_dsat
D 0100
1D
0
agc_zero_msk
D 0100
1E
12
agc_rnd
D 0100
1E
8
agc_thres
D 0100
1E
0
BIT
WIDTH
16
8
8
1
1
4
4
4
4
4
4
8
DEFAULT
0
0
0
0
0
0
0
0
0
0
0
0
DESCRIPTION
This is the number of four sample sets to
accumulate for a power measurement. In
CDMA mode, one sample set is the I and Q
of the signal and diversity. Ia and Qa (signal)
are each squared and accumulated and Ib
and Qb (diversity) are squared and
accumulated. In UMTS mode, each I and Q
pair are squared and accumulated. Four
samples are equal to one integration count.
The count is initiated when the sync is
asserted or when the interval start time is
reached. When the integration count is
reached, the accumulated powers are made
available for MPU access and an interrupt is
generated.
The delay from selected sync source to
when the power calculation starts.
The start interval timer is the interval over
which the integration is restarted and must
be greater than the integration count. The
interval start counter and RMS power
accumulation is started at the sync pulse
after the programmed delay and every time
the interval counter reaches its limit. This
value is in 1024 sample units.
Adds a fixed gain of 12 dB at the CIC output
when asserted.
TEST BIT. Set to ’0’ for normal operation.
The value to shift the gain that is then added
to the accumulator when the value of the
incoming data x current gain value is below
the Threshold.
The value to shift the gain that is then
subtracted from the accumulator when the
value of the incoming data x the current gain
value is above the Threshold.
The value to shift the gain that is then added
to the accumulator when the value of the
incoming data x current gain values
consistently equal to zero.
The value to shift the gain that is then
subtracted form the accumulator when the
value of the incoming data x the current gain
value is consistently equal to maximum.
Masks the lower 4 bits of the magnitude of
the input signal so that they are counted as
zeros.
Determines where to round the output of the
AGC. 0000 is 18 bits are out. The number of
bits out of the agc is 18 − agc_rnd.
This is the threshold that the data x gain is
compared to. This value is compared to the
magnitude of the upper eight bits of the agc
output. (Input x gain).
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