LM3S6753 Datasheet, PDF (556/625 Pages) Texas Instruments – Stellaris LM3S6753 Microcontroller

Signal Tables
Table 21-2. Signals by Signal Name (continued)
Pin Name
Pin Number Pin Type Buffer Type^a Description
RXIP
40
I
Analog RXIP of the Ethernet PHY.
SSI0Clk
28
I/O
TTL
SSI module 0 clock.
SSI0Fss
29
I/O
TTL
SSI module 0 frame.
SSI0Rx
30
I
TTL
SSI module 0 receive.
SSI0Tx
31
O
TTL
SSI module 0 transmit.
SWCLK
80
I
TTL
JTAG/SWD CLK.
SWDIO
79
I/O
TTL
JTAG TMS and SWDIO.
SWO
77
O
TTL
JTAG TDO and SWO.
TCK
80
I
TTL
JTAG/SWD CLK.
TDI
78
I
TTL
JTAG TDI.
TDO
77
O
TTL
JTAG TDO and SWO.
TMS
79
I/O
TTL
JTAG TMS and SWDIO.
TRST
89
I
TTL
JTAG TRST.
TXON
46
O
Analog TXON of the Ethernet PHY.
TXOP
43
O
Analog TXOP of the Ethernet PHY.
U0Rx
26
I
TTL
UART module 0 receive. When in IrDA mode, this signal has
IrDA modulation.
U0Tx
27
O
TTL
UART module 0 transmit. When in IrDA mode, this signal has
IrDA modulation.
U1Rx
12
I
TTL
UART module 1 receive. When in IrDA mode, this signal has
IrDA modulation.
U1Tx
13
O
TTL
UART module 1 transmit. When in IrDA mode, this signal has
IrDA modulation.
VBAT
55
-
Power Power source for the Hibernation module. It is normally
connected to the positive terminal of a battery and serves as
the battery backup/Hibernation module power-source supply.
VCCPHY
36
-
Power VCC of the Ethernet PHY.
83
84
VDD
8
-
Power Positive supply for I/O and some logic.
20
32
44
56
68
81
93
VDD25
14
-
Power Positive supply for most of the logic function, including the
38
processor core and most peripherals.
62
88
VDDA
3
-
Power The positive supply (3.3 V) for the analog circuits (ADC,
98
Analog Comparators, etc.). These are separated from VDD
to minimize the electrical noise contained on VDD from
affecting the analog functions. VDDA pins must be connected
to 3.3 V, regardless of system implementation.
WAKE
50
I
TTL
An external input that brings the processor out of Hibernate
mode when asserted.
556
April 05, 2010
Texas Instruments-Production Data