LM3S6753 Datasheet, PDF (179/625 Pages) Texas Instruments – Stellaris LM3S6753 Microcontroller

Stellaris® LM3S6753 Microcontroller
9 General-Purpose Input/Outputs (GPIOs)
The GPIO module is composed of seven physical GPIO blocks, each corresponding to an individual
GPIO port (Port A, Port B, Port C, Port D, Port E, Port F, Port G). The GPIO module supports 5-41
programmable input/output pins, depending on the peripherals being used.
The GPIO module has the following features:
■ 5-41 GPIOs, depending on configuration
■ 5-V-tolerant input/outputs
■ Programmable control for GPIO interrupts
– Interrupt generation masking
– Edge-triggered on rising, falling, or both
– Level-sensitive on High or Low values
■ Bit masking in both read and write operations through address lines
■ Can initiate an ADC sample sequence
■ Pins configured as digital inputs are Schmitt-triggered.
■ Programmable control for GPIO pad configuration
– Weak pull-up or pull-down resistors
– 2-mA, 4-mA, and 8-mA pad drive for digital communication; up to four pads can be configured
with an 18-mA pad drive for high-current applications
– Slew rate control for the 8-mA drive
– Open drain enables
– Digital input enables
9.1 Functional Description
Important: All GPIO pins are tri-stated by default (GPIOAFSEL=0, GPIODEN=0, GPIOPDR=0,
and GPIOPUR=0), with the exception of the five JTAG/SWD pins (PB7 and PC[3:0]).
The JTAG/SWD pins default to their JTAG/SWD functionality (GPIOAFSEL=1,
GPIODEN=1 and GPIOPUR=1). A Power-On-Reset (POR) or asserting RST puts both
groups of pins back to their default state.
Each GPIO port is a separate hardware instantiation of the same physical block (see Figure
9-1 on page 180). The LM3S6753 microcontroller contains seven ports and thus seven of these
physical GPIO blocks.
April 05, 2010
179
Texas Instruments-Production Data