LM3S6753 Datasheet, PDF (5/625 Pages) Texas Instruments – Stellaris LM3S6753 Microcontroller

Stellaris® LM3S6753 Microcontroller
10 General-Purpose Timers ...................................................................................... 221
10.1 Block Diagram ............................................................................................................ 222
10.2 Functional Description ................................................................................................. 223
10.2.1 GPTM Reset Conditions .............................................................................................. 223
10.2.2 32-Bit Timer Operating Modes ...................................................................................... 223
10.2.3 16-Bit Timer Operating Modes ...................................................................................... 224
10.3 Initialization and Configuration ..................................................................................... 228
10.3.1 32-Bit One-Shot/Periodic Timer Mode ........................................................................... 228
10.3.2 32-Bit Real-Time Clock (RTC) Mode ............................................................................. 229
10.3.3 16-Bit One-Shot/Periodic Timer Mode ........................................................................... 229
10.3.4 16-Bit Input Edge Count Mode ..................................................................................... 230
10.3.5 16-Bit Input Edge Timing Mode .................................................................................... 230
10.3.6 16-Bit PWM Mode ....................................................................................................... 231
10.4 Register Map .............................................................................................................. 231
10.5 Register Descriptions .................................................................................................. 232
11 Watchdog Timer ................................................................................................... 257
11.1 Block Diagram ............................................................................................................ 258
11.2 Functional Description ................................................................................................. 258
11.3 Initialization and Configuration ..................................................................................... 259
11.4 Register Map .............................................................................................................. 259
11.5 Register Descriptions .................................................................................................. 260
12 Analog-to-Digital Converter (ADC) ..................................................................... 281
12.1 Block Diagram ............................................................................................................ 281
12.2 Functional Description ................................................................................................. 282
12.2.1 Sample Sequencers .................................................................................................... 282
12.2.2 Module Control ............................................................................................................ 283
12.2.3 Hardware Sample Averaging Circuit ............................................................................. 284
12.2.4 Analog-to-Digital Converter .......................................................................................... 284
12.2.5 Differential Sampling ................................................................................................... 284
12.2.6 Test Modes ................................................................................................................. 286
12.2.7 Internal Temperature Sensor ........................................................................................ 287
12.3 Initialization and Configuration ..................................................................................... 287
12.3.1 Module Initialization ..................................................................................................... 287
12.3.2 Sample Sequencer Configuration ................................................................................. 288
12.4 Register Map .............................................................................................................. 288
12.5 Register Descriptions .................................................................................................. 289
13 Universal Asynchronous Receivers/Transmitters (UARTs) ............................. 318
13.1 Block Diagram ............................................................................................................ 319
13.2 Functional Description ................................................................................................. 319
13.2.1 Transmit/Receive Logic ............................................................................................... 319
13.2.2 Baud-Rate Generation ................................................................................................. 320
13.2.3 Data Transmission ...................................................................................................... 321
13.2.4 Serial IR (SIR) ............................................................................................................. 321
13.2.5 FIFO Operation ........................................................................................................... 322
13.2.6 Interrupts .................................................................................................................... 322
13.2.7 Loopback Operation .................................................................................................... 323
13.2.8 IrDA SIR block ............................................................................................................ 323
13.3 Initialization and Configuration ..................................................................................... 323
April 05, 2010
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