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DRV8308_15 Datasheet, PDF (46/60 Pages) Texas Instruments – DRV8308 Brushless DC Motor Controller
DRV8308
SLVSCF7A – FEBRUARY 2014 – REVISED OCTOBER 2014
Typical Application (continued)
9.2.1 Design Requirements
This section describes design considerations.
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DESIGN PARAMETER
Motor voltage
Motor current (peak and RMS)
Speed command method
Required flutter (speed jitter)
Configuration method
Hall element current
Power FET switching time
REFERENCE
VM
IM
speed
flutter
config
IHALL
tFET
EXAMPLE VALUE
24V
10A peak, 3A RMS
Closed-loop at 3000 RPM
< 0.2%
Use OTP
7mA
500ns
9.2.2 Detailed Design Procedure
9.2.2.1 Motor voltage
BLDC motors are typically rated for a certain voltage. Higher voltages generally have the advantage of causing
current to change faster through the inductive windings, which allows for higher RPMs. And for a given required
power delivery (torque * speed), higher voltage allows for lower current.
9.2.2.2 Motor Current (Peak and RMS)
It is important to understand and control motor current. This affects power FET device selection, the amount of
required bulk capacitance, and the sizing of the sense resistor for the DRV8308 current-limiter feature.
With BLDC motors, increasing the load torque increases current. For a fixed load, the current during motor spin-
up is the highest. It is generally a good idea to limit spin-up current by sizing sense resistors appropriately,
because if it’s not limited, a motor can consume many amperes during startup and cause VM to droop unless a
large amount of bulk capacitance is used. Limiting current reduces the bulk capacitance required.
The DRV8308 VLIMITER trips at 0.25V. If the sense resistance is 0.025Ω for example, 10A will be required to raise
the ISEN voltage above 0.25V. When this happens, the DRV8308 drives the external FETs with a shorter duty
cycle to limit current below 10A.
When selecting the power FET device, key parameters to consider are:
• It must be N-channel type, and 6 are needed.
• The max drain current (ID); pulsed and continuous.
• Max VDS must be greater than VM.
• Max VGS must be at least 12V (the DRV8308 drives approximately 10V).
• RDS(ON) – lower values decrease device temperature.
9.2.2.3 Speed Command Method
The DRV8308 can drive BLDCs using an open-loop 0% to 100% command, or using closed-loop speed control.
When using closed-loop, the correct reference clock frequency (on CLKIN) must be calculated.
If DRV8308 register FGSEL is set to 00b to use Hall U to sense motor speed,
fCLKIN = RPM / 60 * (NPOLES / 2)
(5)
NPOLES is the number of permanent magnet poles.
If DRV8308 register FGSEL is set to 10b to use FG to sense motor speed,
fCLKIN = RPM / 60 * NFG
(6)
NFG is the number of FG cycles per motor revolution.
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